High voltage driving using top plane switching with zero voltage frames between driving frames
Improved methods for driving an active matrix of pixel electrodes controlled with thin film transistors when the voltage on a top electrode is being altered between driving frames. The methods described increase performance by providing smaller swings in the overall voltage between the top electrode and pixel electrode while reducing stress on the thin film transistor.
1 . A method of top-plane switching an electro-optic display to decrease strain on electrical components, the electro-optic display comprising:
a layer of electro-optic material disposed between a top electrode and a backplane, the backplane including an array of pixel electrodes, wherein each pixel electrode is coupled to a thin film transistor (TFT) and a storage capacitor, the TFT including a source, a gate, and a drain,
wherein the gate is coupled to a gate line, the source is coupled to a scan line, and the drain is coupled to the pixel electrode, wherein a controller provides time-dependent voltages to the gate line, the scan line, the top electrode, and the storage capacitor,
wherein a first side of the storage capacitor is coupled to the pixel electrode and a second side of the storage capacitor is coupled to the top electrode, the method of driving comprising (in order):
a) providing a first high voltage to the scan line and a first low voltage to the top electrode and the second side of the storage capacitor;
b) providing a first gate pulse sufficient to open the TFT;
c) after the first gate pulse, providing a second high voltage to the top electrode and the second side of the storage capacitor;
d) providing a second gate pulse sufficient to open the TFT;
e) after the second gate pulse, providing a second low voltage to the scan line; and
f) providing a third gate pulse sufficient to open the TFT.
2 . The method of claim 1 , wherein steps a)-f) are completed in three subsequent frames.
3 . The method of claim 1 , wherein the top electrode is light-transmissive.
4 . The method of claim 1 , wherein the TFT is fabricated from amorphous silicon.
5 . The method of claim 4 , wherein the first and second high voltage are +15V.
6 . The method of claim 5 , wherein the first and second low voltages are −15V.
7 . The method of claim 1 , wherein the layer of electro-optic material includes an encapsulated electrophoretic medium comprising a plurality of types of charged particles that move between the top electrode and the backplane in response to an applied electric field.
8 . The method of claim 7 , wherein the electrophoretic medium is encapsulated in a plurality of microcapsules or encapsulated in a plurality of sealed microcells.
9 . The method of claim 7 , wherein the encapsulated electrophoretic medium comprises four different types of charged particles.
10 . The method of claim 1 , further comprising after the third gate pulse, providing a third low voltage to the top electrode and the second side of the storage capacitor.