Memristive structure and memristive device
According to various aspects, a memristive structure is provided including: a first electrode, a second electrode, and a memristive element arranged between the first electrode and the second electrode; wherein the memristive element includes a memristive material that has a ferroelectric polarization capability, and wherein the memristive material has a crystalline microstructure configured to suppress a substantial ferroelectric switching of the memristive element in response to a voltage drop over the memristive element applied via the first electrode and the second electrode.
1 . A memristive structure, comprising:
a first electrode;
a second electrode; and
a memristive element arranged between the first electrode and the second electrode, wherein the memristive element comprises a memristive material that has a ferroelectric polarization capability, and wherein the memristive material has a crystalline microstructure configured to suppress a substantial ferroelectric switching of the memristive element when memristively switching the memristive element in response to an electric switching field caused by a voltage drop over the memristive element applied via the first electrode and the second electrode;
wherein the crystalline microstructure is a single-crystalline microstructure, wherein a main polarization direction of a single crystal thereof is oriented parallel to a surface of the first electrode facing the memristive element or to a surface of the second electrode facing the memristive element.
2 . The memristive structure according to claim 1 ,
wherein a coercive voltage associated with the substantial ferroelectric switching of the memristive element is outside a write voltage range associated with the memristive switching of the memristive element.
3 . The memristive structure according to claim 1 ,
wherein the memristive structure is configured as a self-rectifying memristive structure or is configured to exhibit a nonlinear switching behavior.
4 . The memristive structure according to claim 1 ,
wherein the memristive material of the memristive element is configured to allow for a control of a Schottky-barrier height caused by a contact of the memristive material with the first electrode or with the second electrode.
5 . The memristive structure according to claim 1 ,
wherein the memristive element is configured to allow for a control of an electric resistance of the memristive structure.
6 . The memristive structure according to claim 5 ,
wherein the control of the electric resistance memristive comprises: continuously increasing the electric resistance up to a maximal electric resistance or continuously decreasing the electric resistance down to a minimal electric resistance,
wherein the maximal electric resistance is associated with a minimal barrier current through the memristive element and wherein the minimal electric resistance is associated with a maximal barrier current through the memristive structure.
7 . The memristive structure according to claim 6 ,
wherein an actual electric resistance of the memristive structure represents an actual memristive state of the memristive structure and is associated with an actual barrier current through the memristive structure.
8 . A memristive device comprising:
a memristive structure comprising:
a first electrode;
a second electrode; and
a memristive element arranged between the first electrode and the second electrode, wherein the memristive element comprises a memristive material that has a ferroelectric polarization capability, and wherein the memristive material has a crystalline microstructure configured to suppress a substantial ferroelectric switching of the memristive element when memristively switching the memristive element in response to an electric switching field caused by a voltage drop over the memristive element applied via the first electrode and the second electrode; and
a control circuit configured to control a read operation or a write operation of the memristive element, wherein the read operation comprises the control circuit configured to read out a memristive state of the memristive element via a read voltage in a read voltage range, wherein the write operation comprises the control circuit configured to write the memristive state of the memristive element via a write voltage in a write voltage range, wherein the write voltage range is distinct from the read voltage range.
9 . The memristive structure according to claim 8 ,
wherein the crystalline microstructure is a poly-crystalline microstructure with a plurality of crystallites disposed between the first electrode and the second electrode.
10 . The memristive structure according to claim 9 ,
wherein a maximal crystallite height of the plurality of crystallites is the same as a thickness of the memristive element, or
wherein a maximal crystallite height of the plurality of crystallites is less than a thickness of the memristive element.
11 . The memristive structure according to claim 8 , wherein the crystalline microstructure comprises one or more crystallites having a main polarization direction that is perpendicular to the electric switching field.
12 . The memristive structure according to claim 8 , wherein the crystalline microstructure comprises a poly-crystalline microstructure with a plurality of crystallites, wherein a spatial orientation of the plurality of crystallites is randomly distributed with respect to the electric switching field.
13 . The memristive structure according to claim 8 ,
wherein the crystalline microstructure is a poly-crystalline microstructure with a plurality of crystallites, wherein one or more crystallites of the plurality of crystallites are oriented in a first direction and wherein one or more other crystallites of the plurality of crystallites are oriented in a second direction distinct from the first direction.
14 . The memristive structure of claim 13 ,
wherein the first direction or the second direction is relative to a direction of an electric field caused by the first electrode and second electrode upon applying a voltage between the first electrode and the second electrode, or
wherein the first direction or the second direction are parallel to a first surface of the first electrode, wherein the first surface faces the memristive element, or to a second surface of the second electrode, wherein the second surface faces the memristive element.
15 . The memristive structure according to claim 8 ,
wherein the crystalline microstructure is a poly-crystalline microstructure with a plurality of crystallites, wherein the plurality of crystallites has a spatial orientation distribution such that a main polarization direction of the plurality of crystallites is oriented parallel to a first surface of the first electrode facing the memristive element/or to a second surface of the second electrode facing the memristive element.
16 . The memristive structure according to claim 8 ,
wherein the crystalline microstructure is a poly-crystalline microstructure with a first type of crystals and a second type of crystals, wherein the first type of crystals has an average crystallite size different from an average crystallite size of the second type of crystals.
17 . The memristive structure according to claim 8 ,
wherein the read operation comprises a maximal current caused by the ferroelectric switching that is less than a maximal current caused by the barrier switching, or
wherein the read operation comprises a reference current to determine the memristive state of the memristive element and wherein a maximal current caused by the ferroelectric switching is less than the reference current.
18 . The memristive device according to claim 8 ,
wherein the read operation comprises a maximal current caused by the ferroelectric switching that is less than a maximal current caused by the barrier switching, or
wherein the read operation comprises a reference current to determine the memristive state of the memristive element and wherein a maximal current caused by the ferroelectric switching is less than the reference current.