IP Library Granted Patent US 12665168
Granted Patent B2
US 12665168 · App. 18/674,057 · Granted Jun 23, 2026

Wafer processing apparatus using plasma phase shift

Inventors: Jeongsu Lee (Pyeongtaek-si, KR); Dongok Shin (Suwon, KR); Songwhe Herr (Seongnam-si, KR); DaeYoun Kim (Seo-gu, KR)
Assignee: ASM IP Holding B.V.
H01J37/32174
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Quick Facts
Patent No.
US 12665168
App. No.
18/674,057
Filed
May 24, 2024
Granted
Jun 23, 2026
Kind
B2
Art Unit
2845
USPC
315/111.21
Abstract

A wafer processing system using plasma would be presented. The system may comprise a plurality of reaction chambers disposed on a platform, each of them being configured to process wafers; a plasma generator coupled to the plurality of reaction chambers individually and configured to generate plasma with a certain frequency and a certain phase, and further configured to provide the generated plasma to the plurality of reaction chambers; and a control circuit connected to the plasma generator and configured to adjust the phase of the plasma generated by the plasma generator; wherein, the control circuit is further configured to shift the phase of the generated plasma provided to the plurality of reaction chambers independently.

Claims (23)

1 . A wafer processing system using plasma, the system comprising:

a first reaction chamber, a second reaction chamber, a third reaction chamber, and a fourth reaction chamber disposed on a platform, each of them being configured to process wafers;

a plasma generator coupled to the first/second/third/fourth reaction chambers individually and configured to generate a plasma with a certain frequency and a certain phase, and further configured to provide the generated plasma to the first reaction chamber, the second reaction chamber, the third reaction chamber and the fourth reaction chamber; and

a control circuit connected to the plasma generator and configured to adjust the phase of the plasma generated by the plasma generator;

wherein the control circuit is further configured to shift the phase of the generated plasma provided to the first reaction chamber, the second reaction chamber, the third reaction chamber, and the fourth reaction chamber, independently,

wherein the control circuit is configured to shift the phase of the generated plasma provided to the second reaction chamber 90 degrees ahead of the phase of the generated plasma provided to the first reaction chamber,

wherein the control circuit is configured to shift the phase of the generated plasma provided to the third reaction chamber 90 degrees ahead of the phase of the generated plasma provided to the second reaction chamber,

wherein the control circuit is configured to shift the phase of the generated plasma provided to the fourth reaction chamber 90 degrees ahead of the phase of the generated plasma provided to the third reaction chamber.

2 . The wafer processing system according to the claim 1 , wherein each of the first reaction chamber, the second reaction chamber, the third reaction chamber, and the fourth reaction chamber are disposed regularly around a center of the platform.

3 . The wafer processing system according to the claim 2 , wherein the control circuit is further configured to shift the phase of the generated plasma provided to the first reaction chamber, the second reaction chamber, the third reaction chamber, and the fourth reaction chamber, independently, such that no plasma is generated in the center of the platform.

4 . The wafer processing system according to the claim 2 , wherein the control circuit is further configured to shift the phase of the generated plasma provided to the first reaction chamber, the second reaction chamber, the third reaction chamber, and the fourth reaction chamber, independently, such that destructive interference suppresses plasma formation in the center of the platform.

5 . The wafer processing system according to the claim 1 , wherein each of the first reaction chamber, the second reaction chamber, the third reaction chamber, and the fourth reaction chamber are disposed equidistantly around a center of the platform.

6 . The wafer processing system according to the claim 1 , wherein the first reaction chamber is disposed adjacent to the second reaction chamber and the fourth reaction chamber, and wherein the third reaction chamber is disposed adjacent to the second reaction chamber and the fourth reaction chamber.

7 . A wafer processing system using plasma, the system comprising: a plurality of reaction chambers disposed on a platform, each of them being configured to process wafers;

a plasma generator coupled to the plurality of reaction chambers individually and configured to generate plasma with a certain frequency and a certain phase, and further configured to provide the generated plasma to the plurality of reaction chambers; and

a control circuit connected to the plasma generator and configured to adjust the phase of the plasma generated by the plasma generator;

wherein the control circuit is further configured to shift the phase of the generated plasma provided to the plurality of reaction chambers independently,

wherein the control circuit is further configured to shift the phase of generated plasma provided to a nth reaction chamber (360/a total number of reaction chambers) degrees ahead of the phase of the generated plasma provided to a (n−1)th reaction when n is 2 or more.

8 . The wafer processing system according to claim 7 , wherein each of the plurality of reaction chambers are disposed regularly around a center of the platform.

9 . The wafer processing system according to the claim 8 , wherein the control circuit is further configured to shift the phase of the generated plasma provided to the plurality of reaction chambers, independently, such that no plasma is generated in the center of the platform.

10 . The wafer processing system according to the claim 8 , wherein the control circuit is further configured to shift the phase of the generated plasma provided to the plurality of reaction chambers, independently, such that such that destructive interference suppresses plasma formation in the center of the platform.

11 . The wafer processing system according to claim 7 , wherein the control circuit is further configured to change the phase of the generated plasma provided to the plurality of reaction chambers in real-time.

12 . The wafer processing system according to the claim 7 , wherein each of the plurality of reaction chambers are disposed equidistantly around a center of the platform.