Wafer placement table
A wafer placement table includes a ceramic substrate having a wafer placement surface on an upper surface thereof and containing an electrode therein; a conductive substrate disposed adjacent to a lower surface of the ceramic substrate, serving also as a plasma generating electrode, and having the same diameter as the ceramic substrate; a support substrate disposed adjacent to a lower surface of the conductive substrate, having a greater diameter than the conductive substrate, and electrically insulated from the conductive substrate; and a mounting flange constituting a part of the support substrate and radially extending out of the conductive substrate.
1 . A wafer placement table comprising:
a ceramic substrate having a wafer placement surface on an upper surface thereof, the ceramic substrate containing an electrode therein;
a conductive substrate disposed adjacent to a lower surface of the ceramic substrate, having a cooling medium passage or a cooling medium passage groove, serving also as a plasma generating electrode;
a support substrate disposed adjacent to a lower surface of the conductive substrate, having a greater diameter than the conductive substrate, and electrically insulated from the conductive substrate; and
a mounting flange constituting a part of the support substrate and radially extending out of the conductive substrate.
2 . The wafer placement table according to claim 1 , wherein the conductive substrate is made of metal matrix composite.
3 . The wafer placement table according to claim 1 , wherein the conductive substrate is made of SiSiCTi.
4 . The wafer placement table according to claim 1 , wherein the conductive substrate is made of AlSiC.
5 . The wafer placement table according to claim 1 , wherein the support substrate is formed of an insulating material.
6 . The wafer placement table according to claim 5 , wherein a first joining layer configured to join the ceramic substrate to the conductive substrate and a second joining layer configured to join the conductive substrate to the support substrate are both metal joining layers.
7 . The wafer placement table according to claim 5 , wherein the conductive substrate has the cooling medium passage groove, and the cooling medium passage groove has an opening in the surface of the conductive substrate facing the support substrate.
8 . The wafer placement table according to claim 1 , wherein the support substrate is formed of metal, and the support substrate and the conductive substrate are provided with an insulating layer therebetween.
9 . The wafer placement table according to claim 8 , wherein the support substrate has screw holes in a lower surface thereof.