Low noise charge pump circuit
A charge pump circuit includes first and second capacitors, first, second, third and fourth switches, and a transistor. The first switch is coupled between a top plate of the first capacitor and a first voltage input terminal. The second switch is coupled between a bottom plate of the first capacitor and a reference voltage terminal. The third switch is coupled between the top plate of the first capacitor and a top plate of the second capacitor. The transistor and the fourth switch are coupled in series between the bottom plate of the first capacitor and a second voltage input terminal.
1 . A charge pump circuit, comprising:
a first switch coupled between a first input and a first capacitor terminal;
a second switch coupled between a second capacitor terminal and a first reference terminal;
a third switch coupled between the first capacitor terminal and a third capacitor terminal, the third capacitor terminal coupled to an output; and
a transistor and a fourth switch coupled between the second capacitor terminal and a second reference terminal, the transistor having a control terminal coupled to a fourth capacitor terminal, the fourth capacitor terminal coupled to a second input.
2 . The charge pump circuit of claim 1 , further comprising a fifth switch coupled between the second capacitor terminal and the fourth capacitor terminal.
3 . The charge pump circuit of claim 2 , wherein:
the transistor is a first transistor; and
the charge pump circuit includes a second transistor coupled between the second capacitor terminal and the fifth switch, the second transistor having a control terminal coupled to the second capacitor terminal.
4 . The charge pump circuit of claim 3 , further comprising a resistor coupled between the second capacitor terminal and the second transistor.
5 . The charge pump circuit of claim 3 , wherein the first transistor and the second transistor are natural transistors.
6 . The charge pump circuit of claim 2 , wherein:
the first switch has a first switch control input;
the second switch has a second switch control input;
the third switch has a third switch control input;
the fourth switch has a fourth switch control input;
the fifth switch has a fifth switch control input; and
the charge pump circuit includes a clock generator having:
a first clock phase output coupled to the first switch control input and the second switch control input;
a second clock phase output coupled to the fourth switch control input; and
a third clock phase output coupled to the third switch control input and the fifth switch control input.
7 . The charge pump circuit of claim 1 , further comprising a threshold level shift circuit coupled between the first switch and the first reference terminal.
8 . The charge pump circuit of claim 7 , wherein the threshold level shift circuit includes:
a voltage compensation circuit including:
a first current mirror circuit including a first control transistor and a first mirror transistor;
a first transistor coupled between the first control transistor and the first reference terminal; and
a second transistor coupled between the first mirror transistor and the first reference terminal.
9 . The charge pump circuit of claim 8 , wherein the threshold level shift circuit includes:
a temperature compensation circuit including:
a second current mirror circuit including a second control transistor and a second mirror transistor, in which:
the second mirror transistor is coupled between first switch and the first reference terminal;
the second control transistor is coupled between the second transistor and the first reference terminal; and
a proportional-to-absolute-temperature (PTAT) current source coupled to the second control transistor and the second transistor.
10 . The charge pump circuit of claim 9 , wherein:
the second control transistor includes a first control input and the second mirror transistor includes a second control input;
the temperature compensation circuit includes:
a trim current source coupled between the PTAT current source and the first reference terminal; and
a low-pass filter circuit coupled between the first control input and the second control input.
11 . The charge pump circuit of claim 1 , further comprising a first capacitor coupled between the first and second capacitor terminals, and a second capacitor coupled between the third and fourth capacitor terminals.
12 . A charge pump circuit comprising:
a first capacitor and a second capacitor;
a first switch coupled between a top plate of the first capacitor and first voltage input terminal;
a second switch coupled between the top plate of the first capacitor and a top plate of the second capacitor; and
a threshold level shift circuit coupled between the first switch and a reference voltage terminal, the threshold level shift circuit including:
a proportional-to-absolute-temperature (PTAT) current source; and
a current mirror circuit including a control transistor and a mirror transistor, in which:
the mirror transistor is coupled between first switch and the reference voltage terminal; and
the control transistor is coupled between the PTAT current source and the reference voltage terminal.
13 . The charge pump circuit of claim 12 , wherein the threshold level shift circuit includes a trim current source coupled between the PTAT current source and the reference voltage terminal.
14 . The charge pump circuit of claim 12 , wherein:
the control transistor includes a first control input and the mirror transistor includes a second control input; and
the threshold level shift circuit includes a low-pass filter circuit coupled between the first control input and the second control input.
15 . The charge pump circuit of claim 12 , wherein:
the current mirror circuit is a first current mirror circuit; the control transistor is a first control transistor, and the mirror transistor is a first mirror transistor; and
the threshold level shift circuit includes:
a second current mirror circuit including a second control transistor and a second mirror transistor;
a first transistor coupled between the second control transistor and the reference voltage terminal; and
a second transistor coupled between the second mirror transistor and the first control transistor.
16 . The charge pump circuit of claim 12 , further comprising:
a third switch coupled between a bottom plate of the first capacitor and the reference voltage terminal; and
a transistor and fourth switch coupled in series between the bottom plate of the first capacitor and a second voltage input terminal, in which the transistor has a control terminal, and the control terminal and a bottom plate of the second capacitor are coupled to a third voltage input terminal.
17 . The charge pump circuit of claim 16 , wherein:
the transistor is a first transistor;
the control terminal is a first control terminal; and
the charge pump circuit includes a fifth switch, a second transistor and a resistor, in which:
the fifth switch is coupled between the bottom plate of the second capacitor and the second transistor;
the second transistor is coupled between the resistor and the fifth switch; and the second transistor has a second control terminal coupled to the bottom plate of the first capacitor; and
the resistor is coupled between the bottom plate of the first capacitor and the second transistor.
18 . The charge pump circuit of claim 17 , wherein:
the first switch has a first switch control input;
the second switch has a second switch control input;
the third switch has a third switch control input;
the fourth switch has a fourth switch control input;
the fifth switch has a fifth switch control input; and
the charge pump circuit includes a clock generator having:
a first clock phase output coupled to the first switch control input and the second switch control input;
a second clock phase output coupled to the fourth switch control input; and
a third clock phase output coupled to the third switch control input and the fifth switch control input.
19 . A circuit comprising:
a first transistor coupled between a power input terminal and a power output terminal, the first transistor having a first control terminal;
an amplifier having a first amplifier input, a second amplifier input, and an amplifier output, in which the first amplifier input is coupled to the power output terminal and the second amplifier input is coupled to a reference voltage circuit; and
a charge pump circuit including:
a first capacitor having a first top plate and a first bottom plate;
a second capacitor having a second top plate and a second bottom plate, in which the second top plate is coupled to the first control terminal;
a first switch coupled between the first top plate and the power output terminal, the first switch having a first control input;
a second switch coupled between the first bottom plate and a reference voltage terminal, the second switch having a second control input;
a third switch coupled between the first top plate and the second top plate, the third switch having a third control input;
a second transistor and fourth switch coupled in series between the first bottom plate and a voltage input terminal, the fourth switch having a fourth control input;
a clock generator having:
a first clock phase output coupled to the first control input and the second control input;
a second clock phase output coupled to the fourth control input; and
a third clock phase output coupled to the third control input.
20 . The circuit of claim 19 , wherein:
the charge pump circuit includes a fifth switch, a third transistor and a resistor, in which:
the fifth switch is coupled between the second bottom plate and the third transistor, the fifth switch having a fifth control input coupled to the third clock phase output;
the second transistor is coupled between the resistor and the fifth switch; and the second transistor has a second control terminal coupled to the first bottom plate; and
the resistor is coupled between the first bottom plate and the second transistor.
21 . The circuit of claim 20 , wherein the second transistor and the third transistor are natural transistors.
22 . The circuit of claim 19 , wherein the charge pump circuit includes a threshold level shift circuit coupled between the first switch and the reference voltage terminal.
23 . The circuit of claim 22 , wherein the threshold level shift circuit includes:
a voltage compensation circuit including:
a first current mirror circuit including a first control transistor and a first mirror transistor;
a third transistor coupled between the first control transistor and the reference voltage terminal; and
a fourth transistor coupled between the first mirror transistor and the reference voltage terminal.
24 . The circuit of claim 23 , wherein the threshold level shift circuit includes:
a temperature compensation circuit including:
a second current mirror circuit including a second control transistor and a second mirror transistor, in which:
the second mirror transistor is coupled between first switch and the reference voltage terminal;
the second control transistor is coupled between the second transistor and the reference voltage terminal; and
a proportional-to-absolute-temperature (PTAT) current source coupled to the second control transistor and the second transistor.
25 . The circuit of claim 24 , wherein:
the second control transistor includes a first control terminal and the second mirror transistor includes a second control terminal;
the temperature compensation circuit includes:
a trim current source coupled between the PTAT current source and the reference voltage terminal; and
a low-pass filter circuit coupled between the first control terminal and the second control terminal.