IP Library › Granted Patent US 12665505
Granted Patent B2
US 12665505 · App. 18/808,180 · Granted Jun 23, 2026

Charge pump circuit

Inventors: Mustafa Becermis (Freising, DE); Qiao Yang (Munich, DE)
Assignee: TEXAS INSTRUMENTS INCORPORATED
H02M3/07H02J7/345H02J7/90H02M1/0009H02J2207/50H02M1/14
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Quick Facts
Patent No.
US 12665505
App. No.
18/808,180
Filed
Aug 19, 2024
Granted
Jun 23, 2026
Kind
B2
Examiner
CHEN, SIBIN
Art Unit
2836
USPC
327/536
Abstract

An apparatus includes first and second capacitors, first and second switches, a current source, a first circuit, and a second circuit. The first switch is coupled between a first terminal of the first capacitor and a reference terminal. The current source has an input coupled to a power terminal. The second switch is coupled between the first terminal of the first capacitor and an output of the current source. The second capacitor has a first terminal coupled to the reference terminal. The first circuit has a first terminal coupled to a second terminal of the second capacitor, and a second terminal coupled to a second terminal of the first capacitor. The second circuit has a first input coupled to a third terminal of the first circuit, a second input coupled to the power terminal, and an output coupled to the output of the current source.

Claims (114)

1 . A circuit comprising:

a first capacitor having a first terminal and a second terminal;

a second capacitor having a first terminal coupled to a reference terminal, and a second terminal;

a first switch configured to connect the first terminal of the first capacitor to the reference terminal;

a second switch configured to connect the first terminal of the first capacitor to a power terminal;

a switching circuit having a first terminal coupled to the second terminal of the first capacitor, a second terminal coupled to the second terminal of the second capacitor, and a third terminal, the switching circuit configured to conduct current from the first capacitor to the second capacitor; and

a bottom plate charger circuit having a first input coupled to the power terminal, a second input coupled to the third terminal of the switching circuit, and an output coupled to the second switch, the bottom plate charger circuit configured to detect flow of a first current from the second capacitor to the first capacitor, and conduct a second current from the power terminal to the first capacitor responsive to detection of the first current.

2 . The circuit of claim 1 , further comprising:

a third capacitor having a first terminal and a second terminal;

a third switch configured to connect the first terminal of the third capacitor to the reference terminal;

a fourth switch configured to connect the first terminal of the third capacitor to a power terminal;

wherein:

the output of the bottom plate charger circuit is a first output;

the switching circuit has a third terminal coupled to the second terminal of the third capacitor, and a fourth terminal, the switching circuit configured to conduct current from the third capacitor to the second capacitor; and

the bottom plate charger circuit has a third input coupled to the fourth terminal of the switching circuit, and a second output coupled to the fourth switch, the bottom plate charger circuit configured to detect flow of a third current from the second capacitor to the third capacitor, and conduct a fourth current from the power terminal to the third capacitor responsive to detection of the third current.

3 . The circuit of claim 2 , wherein the switching circuit is configured to conduct current from the first capacitor or the third capacitor to the second capacitor based on a first voltage at the first capacitor and a second voltage at the second capacitor.

4 . The circuit of claim 2 , wherein the bottom plate charger circuit includes:

a first current source configured to provide a fifth current responsive to the third current; and

a second current source configured to provide the fourth current responsive to the fifth current.

5 . The circuit of claim 4 , wherein the bottom plate charger circuit includes:

a transistor configured to conduct the fifth current responsive to a voltage at the fourth terminal of the switching circuit; and

a current mirror circuit coupled to the transistor, the current mirror circuit configured to provide the fourth current responsive to the fifth current.

6 . The circuit of claim 1 , wherein the bottom plate charger circuit includes:

a first current source configured to provide a third current responsive to the first current; and

a second current source configured to provide the second current responsive to the third current.

7 . The circuit of claim 1 , wherein the bottom plate charger circuit includes:

a transistor configured to conduct a third current responsive to a voltage at the third terminal of the switching circuit; and

a current mirror circuit coupled to the transistor, the current mirror circuit configured to provide the second current responsive to the third current.

8 . An apparatus comprising:

a first capacitor having a first terminal and a second terminal;

a first switch coupled between the first terminal of the first capacitor and a reference terminal;

a current source having an output, and an input coupled to a power terminal;

a second switch coupled between the first terminal of the first capacitor and the output of the current source;

a second capacitor having a first terminal coupled to the reference terminal and a second terminal;

a first circuit having a first terminal coupled to the second terminal of the second capacitor, and a second terminal coupled to the second terminal of the first capacitor, and a third terminal; and

a second circuit having a first input coupled to the third terminal of the first circuit, a second input coupled to the power terminal, and an output coupled to the output of the current source.

9 . The apparatus of claim 8 , wherein:

the current source is a first current source;

the output of the second circuit is a first output;

the first circuit has a third terminal, and a fourth terminal;

the second circuit has a second input coupled to the fourth terminal of the first circuit, and a second output; and

the apparatus includes:

a third capacitor having a first terminal, and a second terminal coupled to the third terminal of the first circuit;

a third switch coupled between the first terminal of the third capacitor and the reference terminal;

a second current source having an output coupled to the second output of the second circuit, and an input coupled to a power terminal; and

a fourth switch coupled between the first terminal of the third capacitor and the output of the second current source.

10 . The apparatus of claim 9 , wherein the first circuit includes:

a first transistor having a first terminal coupled to the power terminal, a second terminal, and a control terminal;

a second transistor having a first terminal coupled to the power terminal, a second terminal coupled to the control terminal of the first transistor, and a control terminal coupled to the second terminal of the first transistor;

a third transistor having a first terminal coupled to the second terminal of the second capacitor, a second terminal, and a control terminal;

a fourth transistor having a first terminal coupled to the first terminal of the third transistor, a second terminal, and a control terminal;

a first resistor having a first terminal coupled to the second terminal of the third transistor, and a second terminal coupled to the first input of the second circuit and the control terminal of the fourth transistor; and

a second resistor having a first terminal coupled to the second terminal of the fourth transistor, and a second terminal coupled to the second input of the second circuit and the control terminal of the third transistor.

11 . The apparatus of claim 9 , wherein the second circuit includes:

a second current source having a control input coupled to the fourth terminal of the first circuit, a current input coupled to the second terminal of the second capacitor, and a current output;

a third current source having a control input, a current input coupled to the power terminal, and a current output coupled to the output of the second current source; and

a switch coupled between the current output of the second current source and the current input of the third current source.

12 . The apparatus of claim 9 , wherein the second circuit includes:

a first transistor having a first terminal coupled to the second terminal of the second capacitor, a second terminal, and a control terminal coupled to the fourth terminal of the first circuit;

a second transistor having a first terminal, a second terminal coupled to the output of the second current source, and a control terminal coupled to second terminal of the first transistor;

a resistor coupled between the first terminal of the second transistor and the second terminal of the first transistor; and

a third transistor having a first terminal coupled to the power terminal, a second terminal coupled to the output of the current source, and a control terminal coupled to the control terminal of the second transistor.

13 . The apparatus of claim 8 , wherein:

the current source is a first current source; and

the second circuit includes:

a second current source having a control input coupled to the third terminal of the first circuit, a current input coupled to the second terminal of the second capacitor, and a current output;

a third current source having a control input, a current input coupled to the power terminal, and a current output coupled to the output of the first current source; and

a switch coupled between the current output of the second current source and the current input of the third current source.

14 . The apparatus of claim 8 , wherein the second circuit includes:

a first transistor having a first terminal coupled to the second terminal of the second capacitor, a second terminal, and a control terminal coupled to the third terminal of the first circuit;

a second transistor having a first terminal, a second terminal coupled to the output of the current source, and a control terminal coupled to second terminal of the first transistor;

a first resistor coupled between the first terminal of the second transistor and the second terminal of the first transistor; and

a third transistor having a first terminal coupled to the power terminal, a second terminal coupled to the output of the current source, and a control terminal coupled to the control terminal of the second transistor.

15 . A system comprising:

a transistor having a first terminal, a second terminal, and a control terminal;

an error amplifier having a first input coupled to a reference voltage circuit, a second input coupled to the second terminal of the transistor, an output coupled to the control terminal of the transistor, and a power terminal; and

a charge pump circuit having an output coupled to the power terminal of the error amplifier, and a power terminal configured to receive an input voltage, the charge pump circuit including:

a first capacitor having a first terminal and a second terminal;

a first switch coupled between the first terminal of the first capacitor and a reference terminal;

a current source having an output, and an input coupled to a power terminal;

a second switch coupled between the first terminal of the first capacitor and the output of the current source;

a second capacitor having a first terminal coupled to the reference terminal and a second terminal;

a switching circuit having a first terminal coupled to the second terminal of the second capacitor, a second terminal coupled to the second terminal of the first capacitor, and a third terminal; and

a bottom plate charger circuit having a first input coupled to the third terminal of the switching circuit, a second input coupled to the power terminal, and an output coupled to the output of the current source.

16 . The system of claim 15 , wherein:

the current source is a first current source;

the output of the bottom plate charger circuit is a first output;

the switching circuit has a third terminal, and a fourth terminal;

the bottom plate charger circuit has a second input coupled to the fourth terminal of the switching circuit, and a second output; and

the charge pump circuit includes:

a third capacitor having a first terminal, and a second terminal coupled to the third terminal of the switching circuit;

a third switch coupled between the first terminal of the third capacitor and the reference terminal;

a second current source having an output coupled to the second output of the bottom plate charger circuit, and an input coupled to a power terminal; and

a fourth switch coupled between the first terminal of the third capacitor and the output of the second current source.

17 . The system of claim 16 , wherein the bottom plate charger circuit includes:

a second current source having a control input coupled to the fourth terminal of the switching circuit, a current input coupled to the second terminal of the second capacitor, and a current output;

a third current source having a control input, a current input coupled to the power terminal, and a current output coupled to the output of the second current source; and

a switch coupled between the current output of the second current source and the current input of the third current source.

18 . The system of claim 16 , wherein the bottom plate charger circuit includes:

a first transistor having a first terminal coupled to the second terminal of the second capacitor, a second terminal, and a control terminal coupled to the fourth terminal of the switching circuit;

a second transistor having a first terminal, a second terminal coupled to the output of the second current source, and a control terminal coupled to second terminal of the first transistor;

a resistor coupled between the first terminal of the second transistor and the second terminal of the first transistor; and

a third transistor having a first terminal coupled to the power terminal, a second terminal coupled to the output of the current source, and a control terminal coupled to the control terminal of the second transistor.

19 . The system of claim 15 , wherein:

the current source is a first current source; and

the bottom plate charger circuit includes:

a second current source having a control input coupled to the third terminal of the switching circuit, a current input coupled to the second terminal of the second capacitor, and a current output;

a third current source having a control input, a current input coupled to the power terminal, and a current output coupled to the output of the first current source; and

a switch coupled between the current output of the second current source and the current input of the third current source.

20 . The system of claim 15 , wherein the bottom plate charger circuit includes:

a first transistor having a first terminal coupled to the second terminal of the second capacitor, a second terminal, and a control terminal coupled to the third terminal of the switching circuit;

a second transistor having a first terminal, a second terminal coupled to the output of the current source, and a control terminal coupled to second terminal of the first transistor;

a first resistor coupled between the first terminal of the second transistor and the second terminal of the first transistor; and

a third transistor having a first terminal coupled to the power terminal, a second terminal coupled to the output of the current source, and a control terminal coupled to the control terminal of the second transistor.