IP Library › Granted Patent US 12,665,527
Granted Patent B2
US 12,665,527 · App. 18/467,882 · Granted Jun 23, 2026

Member for semiconductor manufacturing apparatus

Inventor: Yusuke Ogiso (Nagakute-City, JP)
Assignee: NGK INSULATORS, LTD.
H02N13/00B23K26/352C04B35/581C04B41/0036C04B41/5346C04B2235/3225C04B2235/3865
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Quick Facts
Patent No.
US 12,665,527
App. No.
18/467,882
Granted
Jun 23, 2026
Kind
B2
Abstract

A member for semiconductor manufacturing apparatus of the present invention includes an AlN ceramic substrate with a surface provided with projections for wafer placement. At least part of an area, provided with no projection, of the AlN ceramic substrate has a surface layer region from the surface to a predetermined depth, and a base material region below the surface layer region. The predetermined depth is 5 μm or less. The oxygen content rate of the surface layer region is higher than the oxygen content rate of the base material region.

Claims (19)

1 . A member for semiconductor manufacturing apparatus, including an AlN ceramic substrate with a surface provided with projections for wafer placement,

wherein at least part of an area, provided with no projection, of the AlN ceramic substrate has a surface layer region from the surface to a predetermined depth, and a base material region below the surface layer region, the predetermined depth is 5 μm or less, and an oxygen content rate of the surface layer region is higher than an oxygen content rate of the base material region, and

wherein a nitrogen content rate of the surface layer region is lower than a nitrogen content rate of the base material region.

2 . The member for semiconductor manufacturing apparatus according to claim 1 ,

wherein an oxygen content rate of the surface layer region is higher than or equal to 2.0 times an oxygen content rate of the base material region.

3 . The member for semiconductor manufacturing apparatus according to claim 1 ,

wherein the surface layer region is blackened.

4 . The member for semiconductor manufacturing apparatus according to claim 1 ,

wherein dross is not present in the surface layer region.

5 . The member for semiconductor manufacturing apparatus according to claim 1 ,

wherein a mass ratio O/N of the surface layer region has a value higher than a mass ratio O/N of the base material region.

6 . The member for semiconductor manufacturing apparatus according to claim 5 ,

wherein the mass ratio O/N of the surface layer region is higher than or equal to 2.2 times the mass ratio O/N of the base material region.

7 . The member for semiconductor manufacturing apparatus according to claim 1 ,

wherein a mass ratio Al/N of the surface layer region has a value higher than a mass ratio Al/N of the base material region.

8 . The member for semiconductor manufacturing apparatus according to claim 7 ,

wherein the mass ratio Al/N of the surface layer region is higher than or equal to 1.1 times the mass ratio Al/N of the base material region.

9 . The member for semiconductor manufacturing apparatus according to claim 1 ,

wherein the area, provided with no projection, of the AlN ceramic substrate has the surface layer region and the base material region.