IP Library Granted Patent US 12665553
Granted Patent B2
US 12665553 · App. 18/064,247 · Granted Jun 23, 2026

Dual-frequency low-noise amplifier circuit

Inventors: Minjun He (Guangzhou, CN); Yaohua Zheng (Guangzhou, CN); Ping Li (Guangzhou, CN)
Assignee: SMARTER MICROELECTRONICS (GUANG ZHOU) CO., LTD.
H03F1/565H03F3/19H03F2200/222H03F2200/294H03F2200/387H03F2200/451
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12665553
App. No.
18/064,247
Granted
Jun 23, 2026
Kind
B2
Abstract

A dual-frequency low-noise amplifier circuit includes an input impedance matching circuit, a radio-frequency signal amplifying circuit and an output impedance matching circuit. An input end of the input impedance matching circuit inputs a radio-frequency signal, and an output end is connected to an input end of the output impedance matching circuit by means of the radio-frequency signal amplifying circuit; an output end of the output impedance matching circuit outputs an amplified radio-frequency signal; a first band radio-frequency signal is amplified, input and output switches are in a first open and closed state, and input and output impedances are first input and output impedances; and a second band radio-frequency signal is amplified, the input and output switches are in a second open and closed state, and the input and output impedances are second input and output impedances. Adjusting the dual-frequency low-noise amplifier circuit can reduce signal reflection and improve signal quality.

Claims (33)

1 . A dual-frequency low-noise amplifier circuit, comprising an input impedance matching circuit including an input switch component, a radio frequency (RF) signal amplification circuit, and an output impedance matching circuit comprising an output switch component, wherein:

an input end of the input impedance matching circuit is configured to input with a RF signal, an output end of the input impedance matching circuit connected to an input end of the output impedance matching circuit through the RF signal amplification circuit, and an output end of the output impedance matching circuit outputting an amplified RF signal,

in response to the RF signal amplification circuit amplifying a RF signal in a first band, controlling the input switch and the output switch to be in a first opening and closed state, such that an impedance of the input impedance matching circuit is a first input impedance, and an impedance of the output impedance matching circuit is a first output impedance,

in response to the RF signal amplification circuit amplifying a RF signal in a second band, controlling the input switch and the output switch to be in a second opening and closed state, such that the impedance of the input impedance matching circuit is a second input impedance, and the impedance of the output impedance matching circuit is a second output impedance;

wherein the RF signal amplification circuit comprises a first transistor, a second transistor, a third transistor, a first capacitor and a first voltage source,

a drain of the first transistor is connected to a drain of the second transistor and a source of the third transistor, a source of the first transistor is connected to a source of the second transistor, and a gate of the first transistor and a gate of the second transistor are connected to the output end of the input impedance matching circuit,

a drain of the third transistor is connected to the input end of the output impedance matching circuit, a gate of the third transistor is grounded through the first capacitor and is further connected to the first voltage source;

wherein the input impedance matching circuit further comprises a first inductor, a second inductor, a second capacitor and a third capacitor, and the input switch component comprises a first switch and a second switch,

a first end of the first inductor is used as the input end of the input impedance matching circuit, a second end of the first inductor is connected to the gate of the first transistor through the second capacitor and is connected in series with the third capacitor through the first switch and then connected to the gate of the second transistor, a first end of the second switch is connected to the gate of the second transistor, and a second end of the second switch is grounded, a first end of the second inductor is connected to the source of the first transistor, and a second end of the second inductor is grounded.

2 . The dual-frequency low-noise amplifier circuit of claim 1 , wherein the output impedance matching circuit further comprises a third inductor, a fourth capacitor, a fifth capacitor and a second voltage source, and the output switch component comprises a third switch,

a first end of the third inductor is used as the input end of the output impedance matching circuit and is connected to a first end of the fourth capacitor and a first end of the fifth capacitor, a second end of the fifth capacitor is used as the output end of the output impedance matching circuit, and a second end of the fourth capacitor is connected to a second end of the third inductor and the second voltage source through the third switch.

3 . The dual-frequency low-noise amplifier circuit of claim 2 , wherein the first opening and closed state is that each of the first switch and the third switch is in an opening state, and the second switch is in a closed state,

the second opening and closed state is that each of the first switch and the third switch is in a closed state, and the second switch is in an opening state.

4 . The dual-frequency low-noise amplifier circuit of claim 1 , further comprising:

a first bias circuit connected to the gate of the first transistor, and configured to provide a first bias voltage; and

a second bias circuit connected to the gate of the second transistor, and configured to provide a second bias voltage.

5 . A dual-frequency low-noise amplifier circuit, comprising an input impedance matching circuit including an input switch component, a radio frequency (RF) signal amplification circuit, and an output impedance matching circuit comprising an output switch component, wherein:

an input end of the input impedance matching circuit is configured to input with a RF signal, an output end of the input impedance matching circuit connected to an input end of the output impedance matching circuit through the RF signal amplification circuit, and an output end of the output impedance matching circuit outputting an amplified RF signal,

in response to the RF signal amplification circuit amplifying a RF signal in a first band, controlling the input switch and the output switch to be in a first opening and closed state, such that an impedance of the input impedance matching circuit is a first input impedance, and an impedance of the output impedance matching circuit is a first output impedance,

in response to the RF signal amplification circuit amplifying a RF signal in a second band, controlling the input switch and the output switch to be in a second opening and closed state, such that the impedance of the input impedance matching circuit is a second input impedance, and the impedance of the output impedance matching circuit is a second output impedance,

wherein the RF signal amplification circuit comprises a first transistor, a second transistor, a third transistor, a first capacitor and a first voltage source,

a drain of the first transistor is connected to a drain of the second transistor and a source of the third transistor, a source of the first transistor is connected to a source of the second transistor, and a gate of the first transistor and a gate of the second transistor are connected to the output end of the input impedance matching circuit,

a drain of the third transistor is connected to the input end of the output impedance matching circuit, a gate of the third transistor is grounded through the first capacitor and is further connected to the first voltage source,

the dual-frequency low-noise amplifier circuit further comprising:

a first bias circuit connected to the gate of the first transistor, and configured to provide a first bias voltage; and

a second bias circuit connected to the gate of the second transistor, and configured to provide a second bias voltage,

wherein the first bias circuit comprises a first bias current source, a fourth transistor and a third voltage source,

a drain of the fourth transistor is connected to the third voltage source through the first bias current source and is short-connected to a gate of the fourth transistor, and a source of the fourth transistor is grounded,

the second bias circuit comprises a second bias current source, a fifth transistor and a fourth voltage source,

a drain of the fifth transistor is connected to the fourth voltage source through the second bias current source and is short-connected to a gate of the fifth transistor, and a source of the fifth transistor is grounded.

6 . The dual-frequency low-noise amplifier circuit of claim 5 , wherein the first bias circuit further comprises a first resistor, through which the gate of the fourth transistor is connected to the gate of the first transistor,

the second bias circuit further comprises a second resistor, through which the gate of the fifth transistor is connected to the gate of the second transistor.

7 . The dual-frequency low-noise amplifier circuit of claim 1 , wherein the first band is a high band, and the second band is a low band.