IP Library Granted Patent US 12665586
Granted Patent B2
US 12665586 · App. 18/975,471 · Granted Jun 23, 2026

Element array circuit and sensor

Inventors: Yusuke Kimoto (Tokyo, JP); Shinji Hara (Tokyo, JP); Tadao Senriuchi (Tokyo, JP)
Assignee: TDK CORPORATION
H03K17/002G01J1/44H03F3/45475
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Quick Facts
Patent No.
US 12665586
App. No.
18/975,471
Granted
Jun 23, 2026
Kind
B2
Abstract

An element array circuit includes one or more first wirings, second wirings, impedance elements, one or more operational amplifiers, one or more first selectors, and one or more second selectors. The one or more first selectors each select one option from a first option group including a first option to apply a first potential to one of respective one or more first ends of the one or more first wirings and a second option to apply a second potential different from the first potential to the one of the one or more first ends. The one or more second selectors each select one option from a second option group including a third option to apply the first potential to one of respective one or more second ends of the first wiring(s) and a fourth option to apply the second potential to the one of the one or more second ends.

Claims (69)

1 . An element array circuit comprising:

one or more first wirings that include respective one or more first ends and respective one or more second ends;

a plurality of second wirings, the second wirings each extending in a direction different from a direction in which the one or more first wirings each extend;

a plurality of impedance elements, the impedance elements each being coupled to both one of the one or more first wirings and one of the second wirings;

one or more operational amplifiers each including a positive input terminal to be set to a first potential, and a negative input terminal couplable to one of the second wirings;

one or more first selectors each coupled to corresponding one of the one or more first ends and configured to select one option from a first option group, the first option group including a first option to apply the first potential to the corresponding one of the one or more first ends and a second option to apply a second potential different from the first potential to the corresponding one of the one or more first ends; and

one or more second selectors each coupled to corresponding one of the one or more second ends and configured to select one option from a second option group, the second option group including a third option to apply the first potential to the corresponding one of the one or more second ends and a fourth option to apply the second potential to the corresponding one of the one or more second ends.

2 . The element array circuit according to claim 1 , further comprising

a processor,

the processor being configured to

apply, through the one or more first selectors, the first potential to one first end, of the one or more first ends, and the second potential to each of the one or more first ends other than the one first end, and

apply, through the one or more second selectors, the first potential to one second end, of the one or more second ends, and the second potential to each of the one or more second ends other than the one second end, the one second end corresponding to the one first end to which the first potential is to be applied.

3 . The element array circuit according to claim 2 , wherein the processor is configured to perform application of the first potential to the one first end and application of the first potential to the one second end in synchronization with each other.

4 . The element array circuit according to claim 1 , further comprising:

one or more third selectors; and

one or more fourth selectors, wherein

the one or more operational amplifiers include one or more first operational amplifiers and one or more second operational amplifiers,

the second wirings include respective third ends and respective fourth ends,

the one or more third selectors are each provided between corresponding one of the third ends and the negative input terminal of corresponding one of the one or more first operational amplifiers, and are each configured to perform a selection operation to select either an electrically continuous state or an electrically discontinuous state between the corresponding one of the third ends and the negative input terminal of the corresponding one of the one or more first operational amplifiers, and

the one or more fourth selectors are each provided between corresponding one of the fourth ends and the negative input terminal of corresponding one of the one or more second operational amplifiers, and are each configured to perform a selection operation to select either an electrically continuous state or an electrically discontinuous state between the corresponding one of the fourth ends and the negative input terminal of the corresponding one of the one or more second operational amplifiers.

5 . The element array circuit according to claim 4 , wherein

the one or more first operational amplifiers comprise a plurality of the first operational amplifiers, and

the negative input terminal of each of the first operational amplifiers is coupled to corresponding one of the second wirings via one of the one or more third selectors.

6 . The element array circuit according to claim 4 , wherein

the one or more second operational amplifiers comprise a plurality of the second operational amplifiers, and

the negative input terminal of each of the second operational amplifiers is coupled to corresponding one of the second wirings via one of the one or more fourth selectors.

7 . The element array circuit according to claim 4 , further comprising

a processor,

the processor being configured to cause one of the one or more fourth selectors to select the electrically continuous state, the one of the one or more fourth selectors being coupled to one fourth end, of the fourth ends, that is the fourth end of a selected second wiring selected from the second wirings,

where at least one of: a state where the first potential is applied through one of the one or more first selectors to one first end, of the one or more first ends, that is the first end of a selected first wiring selected from the one or more first wirings; or a state where the first potential is applied through one of the one or more second selectors to one second end, of the one or more second ends, that is the second end of the selected first wiring, is satisfied,

where one of the one or more third selectors that is coupled to one third end, of the third ends, that is the third end of the selected second wiring has been caused to select the electrically continuous state, and

where an output from one of the one or more first operational amplifiers that is coupled to the one of the one or more third selectors is at an abnormal value.

8 . The element array circuit according to claim 1 , further comprising

a processor, wherein

the second option group further includes a fifth option to cause the corresponding one of the one or more second ends to be open, and

the processor is configured to determine that a break is present in either a first part or a second part, or in each of the first part and the second part, the first part being along one first wiring, of the one or more first wirings, that is coupled to a selected impedance element selected from the impedance elements and being from the selected impedance element to one of the one or more first selectors, the second part being along one second wiring, of the second wirings, that is coupled to the selected impedance element and being from the selected impedance element to one of the one or more operational amplifiers that corresponds to the selected impedance element,

where an output from the one of the one or more operational amplifiers that corresponds to the selected impedance element is at an abnormal value when a first state is satisfied, the first state being a state where the first potential is applied through the one of the one or more first selectors to one first end, of the one or more first ends, that is the first end of the one first wiring coupled to the selected impedance element, and where one second end, of the one or more second ends, that is the second end of the one first wiring coupled to the selected impedance element is caused to be open by one of the one or more second selectors.

9 . The element array circuit according to claim 1 , further comprising

a processor, wherein

the second option group further includes a fifth option to cause the corresponding one of the one or more second ends to be open, and

the processor is configured to determine that a break is present in a first part, the first part being along one first wiring, of the one or more first wirings, that is coupled to a selected impedance element selected from the impedance elements and being from the selected impedance element to one of the one or more first selectors,

where an output from one of the one or more operational amplifiers that corresponds to the selected impedance element is at an abnormal value when a first state is satisfied, the first state being a state where the first potential is applied through the one of the one or more first selectors to one first end, of the one or more first ends, that is the first end of the one first wiring coupled to the selected impedance element, and where one second end, of the one or more second ends, that is the second end of the one first wiring coupled to the selected impedance element is caused to be open by one of the one or more second selectors, and

where the output from the one of the one or more operational amplifiers that corresponds to the selected impedance element is at a normal value when a second state is satisfied, the second state being a state where the first potential is applied through the one of the one or more first selectors to the first end of the one first wiring coupled to the selected impedance element and where the first potential is applied through the one of the one or more second selectors to the second end of the one first wiring coupled to the selected impedance element.

10 . The element array circuit according to claim 4 , wherein

the processor is configured to determine that a break is present in a second part, the second part being along one second wiring, of the second wirings, that is coupled to a selected impedance element selected from the impedance elements and being from the selected impedance element to one of the one or more first operational amplifiers that is coupled to one third selector, of the one or more third selectors, that corresponds to the selected impedance element,

where an output from the one of the one or more first operational amplifiers that is coupled to the one third selector that corresponds to the selected impedance element is at an abnormal value when the one third selector that corresponds to the selected impedance element has selected the electrically continuous state, and

where an output from one of the one or more second operational amplifiers that is coupled to one fourth selector, of the one or more fourth selectors, that corresponds to the selected impedance element is at a normal value when the one fourth selector that corresponds to the selected impedance element has selected the electrically continuous state.

11 . A sensor comprising the element array circuit according to claim 1 .

12 . An element array circuit comprising:

a plurality of first wirings, the first wirings including respective first ends and respective second ends;

one or more second wirings each extending in a direction different from a direction in which the first wirings each extend;

a plurality of impedance elements, the impedance elements each being coupled to both one of the first wirings and one of the one or more second wirings;

one or more operational amplifiers each including a positive input terminal to be set to a first potential, and a negative input terminal couplable to one of the one or more second wirings;

a plurality of first selectors, the first selectors each being coupled to corresponding one of the first ends and configured to select one option from a first option group, the first option group including a first option to apply the first potential to the corresponding one of the first ends and a second option to apply a second potential different from the first potential to the corresponding one of the first ends; and

a plurality of second selectors, the second selectors each being coupled to corresponding one of the second ends and configured to select one option from a second option group, the second option group including a third option to apply the first potential to the corresponding one of the second ends and a fourth option to apply the second potential to the corresponding one of the second ends.

13 . The element array circuit according to claim 12 , further comprising

a processor,

the processor being configured to

apply, through the first selectors, the first potential to one first end, of the first ends, and the second potential to each of the first ends other than the one first end, and

apply, through the second selectors, the first potential to one second end, of the second ends, and the second potential to each of the second ends other than the one second end, the one second end corresponding to the one first end to which the first potential is to be applied.

14 . The element array circuit according to claim 13 , wherein the processor is configured to perform application of the first potential to the one first end and application of the first potential to the one second end in synchronization with each other.

15 . The element array circuit according to claim 12 , further comprising:

one or more third selectors; and

one or more fourth selectors, wherein

the one or more operational amplifiers include one or more first operational amplifiers and one or more second operational amplifiers,

the one or more second wirings include respective one or more third ends and respective one or more fourth ends,

the one or more third selectors are each provided between corresponding one of the one or more third ends and the negative input terminal of corresponding one of the one or more first operational amplifiers, and are each configured to perform a selection operation to select either an electrically continuous state or an electrically discontinuous state between the corresponding one of the one or more third ends and the negative input terminal of the corresponding one of the one or more first operational amplifiers, and

the one or more fourth selectors are each provided between corresponding one of the one or more fourth ends and the negative input terminal of corresponding one of the one or more second operational amplifiers, and are each configured to perform a selection operation to select either an electrically continuous state or an electrically discontinuous state between the corresponding one of the one or more fourth ends and the negative input terminal of the corresponding one of the one or more second operational amplifiers.

16 . A sensor comprising the element array circuit according to claim 12 .