IP Library Granted Patent US 12665605
Granted Patent B1
US 12665605 · App. 18/940,291 · Granted Jun 23, 2026

Hybrid wideband / narrowband direct digital transceiver

Inventors: Dean C. Puzzo (Alton Bay, NH); Michael W. Blum (Milford, NH); Christopher R. Bye (Bedford, NH)
Assignee: BAE Systems Information and Electronic Systems Integration Inc.
H03M1/02H04B1/406
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Quick Facts
Patent No.
US 12665605
App. No.
18/940,291
Granted
Jun 23, 2026
Kind
B1
Abstract

A hybrid wideband/narrowband direct digital transceiver. In an example, the transceiver includes a first-stage downconverter configured to convert a radio frequency (RF) input analog signal to a first intermediate frequency (IF1) narrowband (NB) input analog signal; a second-stage downconverter configured to convert the IF1 NB input analog signal or a millimeter wave (mmW) input analog signal to a second intermediate frequency (IF2) NB input analog signal; one or more analog to digital converters (ADCs) configured to convert one or more of the IF1 NB input analog signal, the IF2 NB input analog signal, and the RF input analog signal to digital input signals; and a processor configured to control the first-stage downconverter to set a center frequency and bandwidth of the IF1 NB input analog signal and control the second-stage downconverter to set a center frequency and bandwidth of the IF2 NB input analog signal.

Claims (88)

1 . A transceiver system comprising:

a receiver comprising

a first-stage downconverter configured to convert a radio frequency (RF) input analog signal to a first intermediate frequency (IF1) narrowband (NB) input analog signal, and

a second-stage downconverter configured to convert the IF1 NB input analog signal or a millimeter wave (mmW) input analog signal to a second intermediate frequency (IF2) NB input analog signal;

one or more analog to digital converters (ADCs) configured to convert one or more of the IF1 NB input analog signal, the IF2 NB input analog signal, and the RF input analog signal to digital input signals; and

a processor configured to control the first-stage downconverter to set a center frequency and bandwidth of the IF1 NB input analog signal and control the second-stage downconverter to set a center frequency and bandwidth of the IF2 NB input analog signal.

2 . The transceiver system of claim 1 , comprising:

one or more digital to analog converters (DACs) configured to convert a digital output signal to one or more of a first IF1 NB output analog signal, an IF2 NB output analog signal, and a first RF output analog signal; and

a transmitter comprising

a second-stage upconverter configured to convert the IF2 NB output analog signal to a second IF1 NB output analog signal or to a mmW output analog signal, and

a first-stage upconverter configured to convert the first IF1 NB output analog signal or the second IF1 NB output analog signal to a second RF output analog signal;

wherein the processor is configured to control the second-stage upconverter to set a center frequency and bandwidth of the IF1 NB output analog signal or the mmW output analog signal and control the first-stage upconverter to set a center frequency and bandwidth of the second RF output analog signal.

3 . The transceiver system of claim 1 , comprising:

an RF receive antenna configured to receive an RF signal;

an RF wideband (WB) filter coupled to the RF receive antenna and configured to filter the received RF signal to an RF bandwidth to generate the RF input analog signal;

a mmW receive antenna configured to receive a mmW signal; and

a mmW filter coupled to the mmW receive antenna and configured to filter the received mmW signal to an mmW bandwidth to generate the mmW input analog signal.

4 . The transceiver system of claim 3 , wherein the RF bandwidth is in a range of 0.1 GigaHertz (GHz) to 20 GHz, and the mmW bandwidth is in a range of 20 GHz to 60 GHz.

5 . The transceiver system of claim 1 , wherein the processor is configured to:

generate a first control signal to select either the IF1 NB input analog signal or the mmW input analog signal for conversion by the second-stage downconverter;

generate a second control signal to select either the IF1 NB output analog signal or the second IF1 NB output analog signal for conversion by the first-stage upconverter; and

generate a third control signal to cause the second-stage upconverter to either route the second IF1 NB output analog signal to the first-stage upconverter or to route the mmW output analog signal to the mmW transmit antenna.

6 . The transceiver system of claim 5 , wherein the processor is configured to:

analyze the digital input signals to detect a density of signals exceeding a density threshold and to detect saturation of the one or more ADCs;

control the first-stage downconverter based on the detected density and/or the detected saturation;

control the second-stage downconverter based on the detected density and/or the detected saturation; and

generate the first control signal based on the detected density and/or the detected saturation.

7 . The transceiver system of claim 6 , wherein the processor is configured to:

control the first-stage upconverter based on the detected density and/or the detected saturation;

control the second-stage upconverter based on the detected density and/or the detected saturation; and

generate the second control signal and the third control signal based on the detected density and/or the detected saturation.

8 . A method for operating a transceiver, the method comprising:

converting, via a first-stage downconverter, a radio frequency (RF) input analog signal to a first intermediate frequency (IF1) narrowband (NB) input analog signal;

converting, via a second-stage downconverter, the IF1 NB input analog signal or a millimeter wave (mmW) input analog signal to a second intermediate frequency (IF2) NB input analog signal;

converting, via one or more analog to digital converters (ADCs), one or more of the IF1 NB input analog signal, the IF2 NB input analog signal, and the RF input analog signal to digital input signals;

controlling the first-stage downconverter to set a center frequency and bandwidth of the IF1 NB input analog signal; and

controlling the second-stage downconverter to set a center frequency and bandwidth of the IF2 NB input analog signal.

9 . The method of claim 8 , comprising:

converting, via one or more digital to analog converters (DACs), a digital output signal to one or more of a first IF1 NB output analog signal, an IF2 NB output analog signal, and a first RF output analog signal;

converting, via a second-stage upconverter, the IF2 NB output analog signal to a second IF1 NB output analog signal or to a mmW output analog signal;

converting, via a first-stage upconverter, the first IF1 NB output analog signal or the second IF1 NB output analog signal to a second RF output analog signal;

controlling the second-stage upconverter to set a center frequency and bandwidth of the IF1 NB output analog signal or the mmW output analog signal; and

controlling the first-stage upconverter to set a center frequency and bandwidth of the second RF output analog signal.

10 . The method of claim 8 , comprising:

filtering a received RF signal to an RF bandwidth to generate the RF input analog signal; and

filtering a received mmW signal to an mmW bandwidth to generate the mmW input analog signal.

11 . The method of claim 10 , wherein the RF bandwidth is in a range of 0.1 GigaHertz (GHz) to 20 GHz, and the mmW bandwidth is in a range of 20 GHz to 60 GHz.

12 . The method of claim 8 , comprising:

generating a first control signal to select either the IF1 NB input analog signal or the mmW input analog signal for conversion by the second-stage downconverter;

generating a second control signal to select either the IF1 NB output analog signal or the second IF1 NB output analog signal for conversion by the first-stage upconverter; and

generating a third control signal to cause the second-stage upconverter to either route the second IF1 NB output analog signal to the first-stage upconverter or to route the mmW output analog signal to the mmW transmit antenna.

13 . The method of claim 12 , comprising:

analyzing the digital input signals to detect a density of signals exceeding a density threshold and to detect saturation of the one or more ADCs;

controlling the first-stage downconverter based on the detected density and/or the detected saturation;

controlling the second-stage downconverter based on the detected density and/or the detected saturation; and

generating the first control signal based on the detected density and/or the detected saturation.

14 . The method of claim 13 , comprising:

controlling the first-stage upconverter based on the detected density and/or the detected saturation;

controlling the second-stage upconverter based on the detected density and/or the detected saturation; and

generating the second control signal and the third control signal based on the detected density and/or the detected saturation.

15 . A computer program product including one or more non-transitory machine-readable mediums encoded with instructions that when executed by one or more processors cause a process to be carried out for operating a transceiver, the process comprising:

converting, via a first-stage downconverter, a radio frequency (RF) input analog signal to a first intermediate frequency (IF1) narrowband (NB) input analog signal;

converting, via a second-stage downconverter, the IF1 NB input analog signal or a millimeter wave (mmW) input analog signal to a second intermediate frequency (IF2) NB input analog signal;

converting, via one or more analog to digital converters (ADCs), one or more of the IF1 NB input analog signal, the IF2 NB input analog signal, and the RF input analog signal to digital input signals;

controlling the first-stage downconverter to set a center frequency and bandwidth of the IF1 NB input analog signal; and

controlling the second-stage downconverter to set a center frequency and bandwidth of the IF2 NB input analog signal.

16 . The computer program product of claim 15 , the process comprising:

converting, via one or more digital to analog converters (DACs), a digital output signal to one or more of a first IF1 NB output analog signal, an IF2 NB output analog signal, and a first RF output analog signal;

converting, via a second-stage upconverter, the IF2 NB output analog signal to a second IF1 NB output analog signal or to a mmW output analog signal;

converting, via a first-stage upconverter, the first IF1 NB output analog signal or the second IF1 NB output analog signal to a second RF output analog signal;

controlling the second-stage upconverter to set a center frequency and bandwidth of the IF1 NB output analog signal or the mmW output analog signal; and

controlling the first-stage upconverter to set a center frequency and bandwidth of the second RF output analog signal.

17 . The computer program product of claim 15 , the process comprising:

filtering a received RF signal to an RF bandwidth to generate the RF input analog signal; and

filtering a received mmW signal to an mmW bandwidth to generate the mmW input analog signal.

18 . The computer program product of claim 17 , wherein the RF bandwidth is in a range of 0.1 GigaHertz (GHz) to 20 GHz, and the mmW bandwidth is in a range of 20 GHz to 60 GHz.

19 . The computer program product of claim 15 , the process comprising:

generating a first control signal to select either the IF1 NB input analog signal or the mmW input analog signal for conversion by the second-stage downconverter;

generating a second control signal to select either the IF1 NB output analog signal or the second IF1 NB output analog signal for conversion by the first-stage upconverter; and

generating a third control signal to cause the second-stage upconverter to either route the second IF1 NB output analog signal to the first-stage upconverter or to route the mmW output analog signal to the mmW transmit antenna.

20 . The computer program product of claim 19 , the process comprising:

analyzing the digital input signals to detect a density of signals exceeding a density threshold and to detect saturation of the one or more ADCs;

controlling the first-stage downconverter based on the detected density and/or the detected saturation;

controlling the second-stage downconverter based on the detected density and/or the detected saturation;

generating the first control signal based on the detected density and/or the detected saturation;

controlling the first-stage upconverter based on the detected density and/or the detected saturation;

controlling the second-stage upconverter based on the detected density and/or the detected saturation; and

generating the second control signal and the third control signal based on the detected density and/or the detected saturation.