IP Library Granted Patent US 12666168
Granted Patent B2
US 12666168 · App. 18/832,335 · Granted Jun 23, 2026

Solid-state imaging device and method of outputting imaging data

Inventor: Yoshinori Muramatsu (Kanagawa, JP)
Assignee: Sony Semiconductor Solutions Corporation
H04N25/42H04N25/7795
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Quick Facts
Patent No.
US 12666168
App. No.
18/832,335
Granted
Jun 23, 2026
Kind
B2
Abstract

Simplified solid-state imaging device configurations for outputting imaging data and low-resolution data are disclosed. In one example, a solid-state imaging device includes an imaging unit, a resolution conversion unit, and a switching unit. The imaging unit generates the imaging data. The resolution conversion unit reduces a resolution of the imaging data to convert the imaging data into the low-resolution data. The switching unit switches between output of the imaging data and output of the low-resolution data on the basis of setting of a designated region on an imaging region of the imaging unit. A region control unit controls the designated region on the imaging region of the imaging unit and controls switching of the switching unit on the basis of a position of the designated region may be further included.

Claims (37)

1 . A solid-state imaging device comprising:

an imaging circuit configured to generate imaging data;

a scaler circuit configured to reduce a resolution of the imaging data to convert the imaging data into low-resolution data;

a switching circuit configured to switch between output of the imaging data and output of the low-resolution data on a basis of setting of a designated region on an imaging region of the imaging circuit;

a region control circuit configured to control the designated region on the imaging region of the imaging circuit and control switching of the switching circuit on a basis of a position of the designated region; and

a first memory configured to store the low-resolution data generated by the scaler circuit for one row and output the low-resolution data to the switching circuit, wherein

the region control circuit includes a timing controller that controls output timing of the first memory and switching timing of the switching circuit on the basis of the setting of the designated region.

2 . The solid-state imaging device according to claim 1 , wherein

the switching circuit outputs the imaging data for a row including the designated region, and outputs the low-resolution data for a row not including the designated region.

3 . The solid-state imaging device according to claim 1 , wherein

the timing controller controls the output timing of the first memory and a switching timing of the switching circuit such that the low-resolution data is output to a position other than the designated region and the imaging data is output to a position of the designated region.

4 . A solid-state imaging device comprising:

an imaging circuit configured to generate imaging data;

a scaler circuit configured to reduce a resolution of the imaging data to convert the imaging data into low-resolution data;

a switching circuit configured to switch between output of the imaging data and output of the low-resolution data on a basis of setting of a designated region on an imaging region of the imaging circuit;

a region control circuit configured to control the designated region on the imaging region of the imaging circuit and control switching of the switching circuit on a basis of a position of the designated region;

a first memory configured to store the low-resolution data generated by the scaler circuit for one row and output the low-resolution data to the switching circuit; and

a second memory configured to store the imaging data generated by the imaging circuit for one row and outputs the imaging data to the switching circuit.

5 . The solid-state imaging device according to claim 4 , wherein

the switching circuit outputs the low-resolution data stored in the first memory and the imaging data stored in the second memory for each row so as not to overlap each other.

6 . The solid-state imaging device according to claim 4 , wherein

the region control circuit includes a timing controller that controls output timing of the first memory, output timing of the second memory, and switching timing of the switching circuit on the basis of the setting of the designated region.

7 . The solid-state imaging device according to claim 6 , wherein

the timing controller controls the output timing of the first memory, the output timing of the second memory, and a switching timing of the switching circuit such that the imaging data is output for a range of the designated region and the low-resolution data is output to a position other than an output position of the imaging data.

8 . The solid-state imaging device according to claim 6 , wherein

the timing controller controls the output timing of the first memory, the output timing of the second memory, and a switching timing of the switching circuit such that the low-resolution data is output for a range of the designated region and the imaging data is output to a position other than an output position of the low-resolution data.

9 . A method of outputting imaging data, the method comprising:

generating imaging data;

reducing a resolution of the imaging data to convert the imaging data into low-resolution data; and

switching between output of the imaging data and output of the low-resolution data on a basis of setting of a designated region on an imaging region in which the imaging data is captured;

controlling the designated region on the imaging region and controlling the switching on a basis of a position of the designated region;

storing, in a first memory, the low-resolution data for one row and outputting the low-resolution data; and

controlling output timing of the first memory and a timing of the switching on the basis of the setting of the designated region.

10 . The method according to claim 9 , further comprising:

outputting the imaging data for a row including the designated region, and outputting the low-resolution data for a row not including the designated region.

11 . The method according to claim 9 , further comprising:

controlling the output timing of the first memory and the timing of the switching such that the low-resolution data is output to a position other than the designated region and the imaging data is output to a position of the designated region.