Pixel circuit and solid-state imaging device

1 . A pixel circuit, comprising:

a photoreceptor circuit block (PR) configured to generate a photoreceptor signal;

an analog-to-digital converter stage comprising a first input and a second input, wherein the analog-to-digital converter stage is configured to compare a signal based on a first input signal applied to the first input with at least one first threshold voltage and to compare a signal based on a second input signal applied to the second input with at least one second threshold voltage;

an electronic switch assembly configured to pass the photoreceptor signal to the first input in a first operating state and to pass the photoreceptor signal to the second input in a second operating state; and

a first control circuit configured to control the electronic switch assembly based on at least one output signal of the analog-to-digital converter stage.

2 . The pixel circuit according to claim 1 ,

wherein the analog-to-digital converter stage is configured to simultaneously compare the signal derived from the first input signal with an upper first threshold and with a lower first threshold.

3 . The pixel circuit according to claim 1 , wherein the analog-to-digital converter stage comprises:

a first voltage memory circuit electrically connected to a first electronic switch of the electronic switch assembly and configured to generate a first differential voltage by subtracting a first memory voltage from the first input signal; and

a second voltage memory circuit electrically connected to a second electronic switch of the electronic switch assembly and configured to generate a second differential voltage by subtracting a second memory voltage from the second input signal.

4 . The pixel circuit according to claim 1 , further comprising:

a first memory capacitor and a first memory reset circuit, wherein the first memory capacitor is electrically connected in series between the first electronic switch and the first memory reset circuit, and

a second memory capacitor and a second memory reset circuit, wherein the second memory capacitor is electrically connected in series between the second electronic switch and the second memory reset circuit.

5 . The pixel circuit according to claim 4 ,

wherein each of the first memory reset circuit and the second memory reset circuit comprises a voltage amplifier, a feedback capacitor and a switching element, and is configured such that in an off-state of the switching element the feedback capacitor is effective between input and output of the voltage amplifier and in an on-state of the switching element the feedback capacitor is short-circuited.

6 . The pixel circuit according to claim 5 , further comprising:

an auxiliary control circuit configured to control the switching elements such that the first switching element switches to the off-state when the electronic switching assembly changes to the first operating state and switches to the on-state when the electronic switching assembly changes to the second operating state; and

the second switching element switches to the off-state when the electronic switching assembly changes to the second operating state and switches to the on-state when the electronic switching assembly changes to the first operating state.

7 . The pixel circuit according to claim 6 ,

wherein the auxiliary control circuit is configured to delay, by at least one gate propagation delay, trailing and falling edges of second control signals controlling the first and second switching elements with respect to corresponding edges of first control signals controlling the electronic switch assembly.

8 . The pixel circuit according to claim 1 , further comprising:

a collision detection circuit configured to output a collision detection signal based on output signals of the analog-to-digital converter stage.

9 . The pixel circuit according to claim 8 , further comprising:

a collision control circuit configured to control at least the electronic switch assembly based on the collision detection signal.

10 . A pixel circuit comprising:

a photoreceptor circuit block (PR) configured to generate a photoreceptor signal;

an electronic switch assembly configured to pass the photoreceptor signal to a first input in a first operating state and to pass the photoreceptor signal to a second input in a second operating state; and

an analog-to-digital converter stage comprising the first input and the second input, wherein the analog-to-digital converter stage is configured to compare a signal based on a first input signal applied to the first input with at least one first threshold voltage and to compare a signal based on a second input signal applied to the second input with at least one second threshold voltage, and comprises a first converter stage configured to generate first event data based on the first input signal, and a second converter stage configured to generate second event data based on the second input signal.

11 . The pixel circuit according to claim 10 ,

wherein the first converter stage comprises a first converter circuit for generating the first event data based on the first input signal, and wherein the second converter stage comprises a second converter circuit for generating the second event data based on the second input signal.

12 . The pixel circuit according to claim 10 ,

wherein the analog-to-digital converter stage comprises a shared converter circuit configured to sequentially generate the first event data based on the first input signal and the second event data based on the second input signal.

13 . A solid-state imaging device, comprising:

a pixel array comprising a plurality of pixel circuits, wherein photoelectric conversion elements (PD) of the pixel circuits are arranged in matrix form and wherein each pixel circuit comprises:

a photoreceptor circuit block (PR) configured to generate a photoreceptor signal;

an analog-to-digital converter stage comprising a first input and a second input, wherein the analog-to-digital converter stage is configured to compare a signal based on a first input signal applied to the first input with at least one first threshold voltage and to compare a signal based on a second input signal applied to the second input with at least one second threshold voltage;

and an electronic switch assembly configured to pass the photoreceptor signal to the first input in a first operating state and to pass the photoreceptor signal to the second input in a second operating state;

a collision detection circuit configured to output a collision detection signal based on output signals of the analog-to-digital converter stage;

and a controller configured to control the electronic switch assembly in response to a change of the collision detection signal.