Automatic integration and readout gain read out integrated circuit (ROIC)

1 . A device for imaging having both integration time gain and readout gain comprising:

a plurality of pixels comprising a frame, each said pixel comprising:

a first integration time output; and

a second integration time output, wherein a duration time of said first integration time output is shorter than a duration time of said second integration time output;

a Read Out Integrated Circuit (ROIC) comprising:

at least one column cell comprising:

a gain selection component wherein each of said first integration time output and said second integration time output are compared to a threshold, producing gain bits; and

an Analog to Digital Converter (ADC) producing data bits from said first integration time output and said second integration time output of each of said plurality of pixels;

wherein said column cell outputs said data bits from said ADC and said gain bits for each of said plurality of said pixels; and

wherein a short integration time increases a maximum saturation flux by a ratio of a second integration time to a first integration time, which said device controls.

2 . The device of claim 1 , wherein each of said gain bits and said data bits is read out for each said pixel for each said frame.

3 . The device of claim 1 , wherein gain selection of said gain selection component is based on said first integration time output signal and said second integration time output signal of that pixel for that frame.

4 . The device of claim 1 , wherein said gain bits comprise two bits and said data bits comprise 14 bits.

5 . The device of claim 1 , wherein said pixel comprises direct injection input with two Sample-and-Holds (SHs).

6 . The device of claim 1 , wherein said pixel comprises a 20 Me− well.

7 . The device of claim 1 , wherein said column cell comprises:

an extra low noise amplifier and

a 3:1 Mux with selection criteria;

wherein said extra low noise amplifier receives input from said long integration time output and provides input to said 3:1 Mux with selection criteria, wherein said 3:1 Mux with selection criteria comprises three inputs and provides input to said ADC which provides said data bits output from said column cell.

8 . The device of claim 1 , wherein said column cell comprises:

a first amplifier receiving input from said long integration sample output;

a second amplifier receiving input from said short integration sample output;

a ping-pong sample-and-hold that switches between outputs of said first amplifier and said second amplifier;

a comparator receiving input from said first amplifier and an input of said threshold, wherein said threshold is a threshold voltage VthH, wherein an output of said comparator is provided to a latch providing said gain bits;

wherein said ping-pong sample-and-hold provides input to said ADC.

9 . A method for imaging having both integration time gain and readout gain comprising:

receiving, at a plurality of pixels, photons from an image;

providing a first, short, integration time output and a second, long, integration time output from each pixel of said plurality of pixels;

receiving said short integration time output and said long integration time output at a gain selection component of a column cell of a Read Out Integrated Circuit (ROIC);

comparing, in said gain selection component of said column cell, said pixel long integration time output and a gain to at least one threshold;

determining a data bit output and a gain bit output from said comparison;

whereby a dynamic range of said imaging method is extended;

wherein said method comprises three phases comprising:

a first phase comprising selection of said readout gain;

a second phase comprising selection of said integration time gain; and

a third phase comprising final settling before sample and hold.

10 . The method of claim 9 wherein said first phase readout gain selection comprises:

establishing said readout gain in a high gain configuration;

comparing a value of said long integration time output to a readout gain threshold;

if said long integration time output value is greater than said readout gain threshold, then switching said high readout gain to a low readout gain configuration.

11 . The method of claim 9 wherein said second phase integration time gain selection comprises:

comparing a value of said long integration time output multiplied by a readout gain to an integration time gain threshold;

if said long integration time output value multiplied by said readout gain is greater than said integration time gain threshold, then switching to said short integration time output.

12 . The method of claim 9 wherein said third phase final settling comprises:

maintaining a readout gain and an integration time gain;

connecting to a capacitor of said sample-and-hold for final setting;

outputting said gain bits; and

outputting said data bits.

13 . The method of claim 9 wherein a readout gain threshold equals an integration time gain threshold.

14 . The method of claim 9 wherein said three phases are time periods in a readout line.

15 . The method of claim 9 wherein readout starts at a highest readout gain and lowers said gain if output exceeds said threshold.

16 . The method of claim 9 , wherein a short integration time increases a maximum saturation flux by a ratio of a long integration time to a short integration time, which the system controls.

17 . The method of claim 9 wherein a short integration time increases a maximum saturation flux by a ratio of a long integration time to a short integration time, wherein said ratio is controlled by said imaging method.

18 . A system for imaging having both integration time gain and readout gain comprising:

a plurality of pixels comprising a frame, each said pixel comprising:

a direct injection input with two Sample-and-Holds (SHs);

a short integration time output; and

a long integration time output, whereby said integration time gain extends a range to higher fluxes with shorter integration times;

a Read Out Integrated Circuit (ROIC) comprising:

at least one column cell comprising:

a gain selection component wherein each of said short integration time output and said long integration time output are compared to a threshold producing gain bits; and

an Analog to Digital Converter (ADC) producing data bits;

wherein a first phase readout gain selection comprises:

establishing said readout gain in a high gain configuration;

comparing a value of said long integration time output to a readout gain threshold;

if said long integration time output value is greater than said readout gain threshold, then switching said high readout gain to a low readout gain configuration;

wherein a second phase integration time gain selection comprises:

comparing a value of said long integration time output multiplied by a readout gain to an integration time gain threshold;

if said long integration time output value multiplied by said readout gain is greater than said integration time gain threshold, then switching to said short integration time output;

wherein a third phase final settling comprises:

maintaining a readout gain and an integration time gain;

connecting to a capacitor of said sample-and-hold for final setting;

outputting said gain bits; and

outputting said data bits;

wherein said column cell outputs said data bits from said ADC and said gain bits for each said pixel;

whereby a dynamic range of said imaging device is extended.