Wiring substrate and electronic device

Inventors: Jiawei Xu (Beijing, CN); Zouming Xu (Beijing, CN); Xintao Wu (Beijing, CN); Xiaoxiang Zhang (Beijing, CN); Jie Wang (Beijing, CN); Ningyu Luo (Beijing, CN); Tingwei Han (Beijing, CN)

Assignees: Hefei BOE Ruisheng Technology Co., Ltd.; BOE Technology Group Co., Ltd.

H05K1/111 H05K1/0284

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Quick Facts

Patent No.: US 12666533
App. No.: 18/688,897
Granted: Jun 23, 2026
Kind: B2

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Abstract

A wiring substrate includes a base substrate, a plurality of constant voltage signal lines and a plurality of first connection lines, and a plurality of first pad regions. Each of the first pad regions includes a plurality of sub-regions. Each of the sub-regions includes a plurality of pad groups. The plurality of pad groups include at least a first pad group and a last pad group. An orthographic projection of one of the first pad group and the last pad group on the base substrate is partially overlapped with an orthographic projection of one of the constant voltage signal lines on the base substrate. An orthographic projection of the other of the first pad group and the last pad group on the base substrate is partially overlapped with an orthographic projection of one of the first connection lines on the base substrate.

Claims (29)

1 . A wiring substrate, comprising:

a base substrate;

a plurality of constant voltage signal lines and a plurality of first connection lines that are disposed on a same side of the base substrate;

a plurality of first pad regions, wherein each of the first pad regions comprises a plurality of sub-regions arranged in parallel, each of the sub-regions comprising a plurality of pad groups arranged in series, the plurality of pad groups arranged in series comprising at least a first pad group and a last pad group, an orthographic projection of either the first pad group or the last pad group on the base substrate being partially overlapped with an orthographic projection of one of the constant voltage signal lines on the base substrate, an orthographic projection of other of the first pad group or the last pad group on the base substrate being partially overlapped with an orthographic projection of one of the first connection lines on the base substrate.

2 . The wiring substrate according to claim 1 , wherein either the first pad group or the last pad group is coupled to one of the constant voltage signal lines, and other of the first pad group or the last pad group is coupled to one of the first connection lines.

3 . The wiring substrate according to claim 1 , wherein the plurality of first pad regions are arranged in an array, each of the constant voltage signal lines extends along a first direction, each of the first connection lines extends along the first direction, and the plurality of the constant voltage signal lines are spaced apart along a second direction.

4 . The wiring substrate according to claim 3 , further comprising: a second connection line, wherein the plurality of pad groups in the sub-region are connected in series by the second connection line.

5 . The wiring substrate according to claim 4 , wherein an extension direction of the second connection line is intersected with an extension direction of a respective first connection line.

6 . The wiring substrate according to claim 1 , further comprising: a plurality of second pad regions, wherein each of the second pad regions comprises an output pad, the output pad being connected to at least one of the first pad regions.

7 . The wiring substrate according to claim 6 , wherein at least two of the plurality of second pad regions are coupled by one of the first connection lines.

8 . The wiring substrate according to claim 7 , wherein each of the plurality of second pad regions further comprises an address pad, and one end of at least one of the first connecting lines is connected to the output pad of one of the second pad regions, and other end of the first connecting line is connected to the address pad of other of the second pad regions.

9 . The wiring substrate according to claim 6 , further comprising: a plurality of common voltage signal lines, wherein each of the common voltage signal lines extends along a first direction, the plurality of common voltage signal lines are spaced apart along a second direction, each of the second pad regions further comprises a ground pad, the plurality of second pad regions are arranged in an array, and the ground pads of the plurality of the second pad regions arranged along the first direction are, respectively, connected to one of the common voltage signal lines.

10 . The wiring substrate according to claim 9 , wherein a ratio of a width of each of the constant voltage signal lines to a width of each of the common voltage signal lines is greater than or equal to 0.5 and less than or equal to 1.5.

11 . The wiring substrate according to claim 1 , wherein a ratio of a width of each of the constant voltage signal lines to a width of each of the first connection lines is greater than or equal to 4 and less than or equal to 10.

12 . The wiring substrate according to claim 1 , wherein each of the first pad regions comprises two of the plurality of sub-regions arranged in parallel, wherein one of the two sub-regions comprises a first pad group and a second pad group that are arranged in series, and other of the two sub-regions comprises a third pad group and a fourth pad group that are arranged in series;

wherein the first pad group is juxtaposed with the second pad group in a second direction and is juxtaposed with the third pad group in a first direction, and the fourth pad group is juxtaposed with the second pad group in the first direction and is juxtaposed with the third pad group in the second direction.

13 . An electronic device, comprising: a wiring substrate and an electronic element; wherein

the wiring substrate comprises:

a base substrate;

a plurality of constant voltage signal lines and a plurality of first connection lines that are disposed on a same side of the base substrate;

the electronic element is connected to the first pad region.

14 . The electronic device according to claim 13 , further comprising: a first transparent protection structure, wherein an orthographic projection of the first transparent protection structure on the base substrate covers an orthographic projection of the electronic element on the base substrate.

15 . The electronic device according to claim 13 , further comprising: a micro drive chip and a second transparent protection structure, wherein the micro drive chip is connected to a second pad region, and an orthographic projection of the second transparent protection structure on the base substrate covers an orthographic projection of the micro drive chip on the base substrate.

16 . The electronic device according to claim 13 , wherein either the first pad group or the last pad group is coupled to one of the constant voltage signal lines, and other of the first pad group or the last pad group is coupled to one of the first connection lines.

17 . The electronic device according to claim 13 , wherein the plurality of first pad regions are arranged in an array, each of the constant voltage signal lines extends along a first direction, each of the first connection lines extends along the first direction, and the plurality of the constant voltage signal lines are spaced apart along a second direction.

18 . The electronic device according to claim 17 , wherein the wiring substrate further comprises a second connection line, the plurality of pad groups in the sub-region being connected in series by the second connection line.

19 . The electronic device according to claim 18 , wherein an extension direction of the second connection line is intersected with an extension direction of a respective first connection line.

20 . The electronic device according to claim 13 , wherein the wiring substrate further comprises a plurality of second pad regions, wherein each of the second pad regions comprises an output pad, the output pad being connected to at least one of the first pad regions.