IP Library › Granted Patent US 12666545
Granted Patent B2
US 12666545 · App. 18/130,719 · Granted Jun 23, 2026

Highly integrated power electronics and methods of manufacturing the same

Inventors: Feng Zhou (Ann Arbor, MI); Tianzhu Fan (Houston, TX); Ercan Mehmet Dede (Ann Arbor, MI)
Assignee: Toyota Motor Engineering & Manufacturing North America, Inc.
H05K3/4611H05K3/0047H05K3/30H05K3/423H05K3/4644H05K3/4697H05K7/20272B33Y10/00H05K2203/107
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12666545
App. No.
18/130,719
Granted
Jun 23, 2026
Kind
B2
Abstract

A method for high volume manufacture of highly integrated power electronics embedded printed circuit board (PCB)-cold plate assemblies includes bonding a power device fabrication panel to a multi-layer PCB, drilling via passageways in the multi-layer PCB, and electroplating a conductive metal into the vias before bonding the power device fabrication panel to a plurality of cold plates and forming an IPEs embedded PCB-cold plate fabrication panel. The method also includes cutting the IPEs embedded PCB-cold plate fabrication panel into a plurality of highly IPEs embedded PCB-cold plate assemblies.

Claims (36)

1 . A method comprising:

bonding a power device fabrication panel to a multi-layer printed circuit board (PCB);

drilling via passageways in the multi-layer PCB;

electroplating a conductive metal into the via passageway;

bonding a plurality of cold plates to the power device fabrication panel and forming an integrated power electronics (IPEs) embedded PCB-cold plate fabrication panel; and

cutting the IPEs embedded PCB-cold plate fabrication panel into a plurality of highly IPEs embedded PCB-cold plate assemblies that individually include an IPEs embedded PCB attached to and in thermal communication with a cold plate comprising a fluid chamber having at least one of an inlet and an outlet formed in a lower wall of the cold plate.

2 . The method according to claim 1 , wherein bonding the power device fabrication panel to the multi-layer PCB comprises laminating the multi-layer PCB onto the power device fabrication panel via a low thermal resistance dielectric layer.

3 . The method according to claim 1 , wherein drilling the via passageways comprises laser drilling the via passageways.

4 . The method according to claim 1 , wherein a bonding interface is disposed between the multi-layer PCB bonded to the cold plate fabrication panel, the bonding interface selected from the group consisting of a low thermal resistance dielectric layer bonding interface, a CVD dielectric layer bonding interface, solder-AlN-solder layers, solder-Si 3 N 4 -solder layers, a solder layer, and a polymer-conductive filler bonding interface.

5 . The method according to claim 4 , wherein the bonding interface further comprises a metallization layer.

6 . The method according to claim 1 , wherein at least one of a porous material and a plurality of fins is disposed within the fluid chamber of the cold plate.

7 . The method according to claim 1 further comprising attaching at least one of an inlet tube and an outlet tube to the at least one of the inlet and the outlet formed in the lower wall of the cold plate.

8 . The method according to claim 1 , wherein bonding the multi-layer PCB to a plurality of cold plates and forming an integrated power electronics (IPEs) embedded PCB-cold plate fabrication panel comprises bonding a plurality of cold plate substrates directly to a plurality of power devices embedded in the power device fabrication panel.

9 . The method according to claim 8 further comprising 3D printing a plurality of cold plate manifolds and bonding the plurality of cold plate manifolds onto the power device fabrication panel and forming the plurality of cold plates bonded to the multi-layer PCB.

10 . A method comprising:

laminating a multi-layer printed circuit board (PCB) onto a power device fabrication panel via a low thermal resistance dielectric layer;

drilling via passageways in the multi-layer PCB;

electroplating copper into the via passageways;

bonding the multi-layer PCB to a cold plate fabrication panel and forming an integrated power electronics (IPEs) embedded PCB-cold plate fabrication panel; and

cutting the IPEs embedded PCB-cold plate fabrication panel into a plurality of highly IPEs embedded PCB-cold plate assemblies that individually include an IPEs embedded PCB attached to and in thermal communication with a cold plate comprising a fluid chamber having at least one of an inlet and an outlet formed in a lower wall of the cold plate.

11 . The method according to claim 10 further comprising forming the inlet and the outlet in the cold plate of each of the plurality of highly IPEs embedded PCB-cold plate assemblies, wherein the inlet is configured for a cooling fluid to flow into the fluid chamber of the cold plate and the outlet is configured for the cooling fluid to flow out of the fluid chamber.

12 . The method according to claim 11 further comprising attaching an inlet tube and an outlet tube to the inlet and the outlet, respectively.

13 . A method comprising:

laminating a multi-layer printed circuit board (PCB) onto a power device fabrication panel via a low thermal resistance dielectric layer;

drilling via passageways in the multi-layer PCB;

electroplating copper into the via passageways;

bonding a plurality of cold plate substrates directly to a plurality of a power devices embedded in the power device fabrication panel;

bonding a plurality of 3D printed cold plate manifolds to the power device fabrication panel and forming an integrated power electronics (IPEs) embedded PCB-cold plate fabrication panel; and

cutting the IPEs embedded PCB-cold plate fabrication panel into a plurality of highly IPEs embedded PCB-cold plate assemblies that individually include an IPEs embedded PCB attached to and in thermal communication with a fluid chamber of a cold plate manifold comprising and at least one of an inlet and an outlet formed in a lower wall thereof.

14 . The method according to claim 13 further comprising attaching at least one of an inlet tube and an outlet tube to the inlet and the outlet, respectively, of each of the plurality of 3D printed cold plate manifolds.

15 . The method according to claim 10 , wherein a bonding interface is disposed between the multi-layer PCB bonded to the cold plate fabrication panel, the bonding interface selected from the group consisting of a low thermal resistance dielectric layer bonding interface, a CVD dielectric layer bonding interface, solder-AlN-solder layers, solder-Si 3 N 4 -solder layers, a solder layer, and a polymer-conductive filler bonding interface.

16 . The method according to claim 15 , wherein the bonding interface further comprises a metallization layer.

17 . The method according to claim 10 , wherein at least one of a porous material and a plurality of fins is disposed within the fluid chamber of the cold plate.

18 . The method according to claim 10 , wherein bonding the multi-layer PCB to a cold plate fabrication panel and forming an integrated power electronics (IPEs) embedded PCB-cold plate fabrication panel comprises bonding a plurality of cold plate substrates directly to a plurality of power devices embedded in the power device fabrication panel.

19 . The method according to claim 13 , wherein drilling the via passageways comprises laser drilling the via passageways.

20 . The method according to claim 13 , wherein at least one of a porous material and a plurality of fins is disposed within the fluid chamber of the cold plate manifold.