IP Library Granted Patent US 12666594
Granted Patent B2
US 12666594 · App. 18/603,228 · Granted Jun 23, 2026

Semiconductor memory device and method for forming semiconductor memory device

Inventors: Peng Guo (Quanzhou City, CN); Yuanbao Wang (Quanzhou City, CN)
Assignee: Fujian Jinhua Integrated Circuit Co., Ltd.
H10B12/30H10B12/482H10B12/488H10D62/115
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Quick Facts
Patent No.
US 12666594
App. No.
18/603,228
Granted
Jun 23, 2026
Kind
B2
Abstract

A method for fabricating a semiconductor memory device includes: forming word lines and bit lines; forming filling patterns between the bit lines and at ends of the bit lines, and forming first gaps surrounded by the filling patterns and the bit lines; depositing an insulating material, to fill up the first gaps surrounded by the filling patterns and the bit lines, and forming cavities surrounded by the insulating material in each of the first gaps respectively; etching the insulating material to form a strip-shaped isolation structure and columnar isolation structures, where the cavity of the strip-shaped isolation structure is exposed to form a seam; after etching the insulating material, removing a portion of the filling patterns to form second gaps, where the second gaps are surrounded by the columnar isolation structures and the bit lines; and depositing a conductive material to fill up the second gaps and the seam concurrently.

Claims (15)

1 . A method for fabricating a semiconductor memory device, comprising:

providing a substrate;

forming a plurality of word lines in the substrate;

forming a plurality of bit lines on the substrate, wherein the bit lines extend along a first direction, and the word lines extend along a second direction;

forming a plurality of filling patterns between the bit lines and at ends of the bit lines, and forming a plurality of first gaps surrounded by the filling patterns and the bit lines, wherein the filling patterns are separated from each other;

depositing an insulating material to fill up the first gaps surrounded by the filling patterns and the bit lines, and forming a plurality of cavities surrounded by the insulating material in the first gaps respectively;

etching the insulating material to form a strip-shaped isolation structure and a plurality of columnar isolation structures, wherein the cavity of the strip-shaped isolation structure is exposed to form a seam;

after etching the insulating material, removing portions of the filling patterns to form a plurality of second gaps, wherein the second gaps are surrounded by the columnar isolation structures and the bit lines; and

depositing a conductive material to fill up the second gaps and the seam concurrently.

2 . The method for fabricating the semiconductor memory device of claim 1 , wherein the seam extends along the second direction and is discontinuously distributed in the strip-shaped isolation structure.

3 . The method for fabricating the semiconductor memory device of claim 1 , wherein an opening of the seam comprises a width extending along the first direction, and the width is larger than 1 nm.

4 . The method for fabricating the semiconductor memory device of claim 1 , wherein a width of the strip-shaped isolation structure in the first direction is larger than a width of each of the columnar isolation structures in the first direction.

5 . The method for fabricating the semiconductor memory device of claim 1 , wherein the filling patterns are disposed at the both sides of each of the strip-shaped isolation structures during depositing the conductive material.

6 . The method for fabricating the semiconductor memory device of claim 1 , wherein the filling patterns are disposed between the bit lines and the columnar isolation structures during depositing the conductive material.

7 . The method for fabricating the semiconductor memory device of claim 1 , wherein the conductive material filled in the seam is electrically insulated from the substrate.