Semiconductor device with programmable insulating layer and method for fabricating the same

1 . A semiconductor device, comprising:

a substrate comprising an array region and a peripheral region positioned adjacent to the array region;

a valley inwardly positioned on a top surface of the peripheral region of the substrate;

a programmable insulating layer conformally positioned on the valley and comprising a V-shaped cross-sectional profile;

a top electrode positioned on the programmable insulating layer;

a peripheral gate structure positioned on the top surface of the peripheral region of the substrate; and

a bottom conductive layer positioned in the substrate and contacting the programmable insulating layer;

wherein the programmable insulating layer is configured to be blown out under a programming voltage;

wherein a top surface of the top electrode and a top surface of the peripheral gate structure are substantially coplanar;

wherein the top electrode comprises a bottom portion positioned on the programmable insulating layer and a top portion positioned on the bottom portion;

wherein the peripheral gate structure comprises:

a gate dielectric layer positioned on the top surface of the peripheral region of the substrate;

a gate bottom conductive layer positioned on the gate dielectric layer; and

a gate top conductive layer positioned on the gate bottom conductive layer;

wherein the programmable insulating layer comprises oxides, nitrides, oxynitrides, silicates, aluminates, titanates, nitrides, high-k dielectric materials, or a combination thereof;

wherein a crystal orientation of the substrate is <110>, <100>, or <111>;

wherein the bottom portion comprises doped polycrystalline silicon, doped polycrystalline germanium, or doped polycrystalline silicon germanium.

2 . The semiconductor device of claim 1 , wherein the top portion comprises tungsten, cobalt, zirconium, tantalum, titanium, aluminum, ruthenium, copper, metal carbides, metal nitrides, transition metal aluminides, or a combination thereof.

3 . The semiconductor device of claim 2 , wherein a width of the bottom conductive layer is greater than or equal to a width of the programmable insulating layer.

4 . The semiconductor device of claim 3 , wherein the bottom conductive layer comprises dopants and has a first electrical type.

5 . The semiconductor device of claim 4 , further comprising a well positioned in the peripheral region of the substrate, wherein the bottom conductive layer is positioned in the well.

6 . The semiconductor device of claim 5 , wherein the well has a second electrical type different from the first electrical type.