Non-volatile memory device and system including the same
A non-volatile memory device includes a substrate; an insulating layer on the substrate; a bit line isolation layer on the insulating layer; a common source line conductive layer on the bit line isolation layer; a ferroelectric memory cell on the bit line isolation layer; a bit line connected to a top of the ferroelectric memory cell; and a common source line connected to the common source line conductive layer and electrically connected to the ferroelectric memory cell, wherein the ferroelectric memory cell includes a ferroelectric layer, a channel layer, a first conductive filler connected to the ferroelectric layer and the channel layer and extending in a vertical direction, and a second conductive filler connected to the ferroelectric layer and the channel layer and extending in the vertical direction, the first conductive filler is connected to the bit line, and the second conductive filler is connected to the common source line.
1 . A non-volatile memory device, comprising:
a substrate;
an insulating layer on the substrate;
a bit line isolation layer on the insulating layer;
a common source line conductive layer on the bit line isolation layer;
a ferroelectric memory cell on the bit line isolation layer;
a bit line connected to a top of the ferroelectric memory cell; and
a common source line connected to the common source line conductive layer and electrically connected to the ferroelectric memory cell,
wherein:
the ferroelectric memory cell includes a ferroelectric layer, a channel layer, a first conductive filler connected to the ferroelectric layer and the channel layer and extending in a vertical direction, and a second conductive filler connected to the ferroelectric layer and the channel layer and extending in the vertical direction,
the first conductive filler is connected to the bit line, and
the second conductive filler is connected to the common source line.
2 . The non-volatile memory device as claimed in claim 1 , wherein:
the bit line extends in a first direction that intersects the vertical direction, and
the common source line extends in the first direction.
3 . The non-volatile memory device as claimed in claim 1 , wherein:
the bit line extends in a first direction that intersects the vertical direction, and
the common source line extends in a second direction that intersects the first direction.
4 . The non-volatile memory device as claimed in claim 1 , wherein the bit line isolation layer includes an insulating material.
5 . The non-volatile memory device as claimed in claim 1 , wherein:
the common source line conductive layer includes an opening therein,
the bit line isolation layer includes a bit line isolation layer protrusion that protrudes through the opening in the common source line conductive layer, and
the bit line isolation layer protrusion is connected to the first conductive filler.
6 . The non-volatile memory device as claimed in claim 1 , further comprising a conductive line that is electrically connected to the ferroelectric layer and directly adjacent thereto in a first direction that intersects the vertical direction.
7 . The non-volatile memory device as claimed in claim 6 , further comprising a word line that is electrically connected to the conductive line, and that extends in the first direction.
8 . A non-volatile memory device, comprising:
a substrate;
an insulating layer on the substrate;
a bit line isolation layer on the insulating layer;
a common source line conductive layer on the bit line isolation layer; and
a ferroelectric memory cell on the bit line isolation layer,
wherein:
the ferroelectric memory cell includes a ferroelectric layer, a channel layer, a first conductive filler connected to the ferroelectric layer and the channel layer and extending in a vertical direction, and a second conductive filler connected to the ferroelectric layer and the channel layer and extending in the vertical direction,
the first conductive filler is connected to the bit line isolation layer, and
the second conductive filler is connected to the common source line conductive layer.
9 . The non-volatile memory device as claimed in claim 8 , wherein the bit line isolation layer includes a bit line isolation layer protrusion that penetrates the common source line conductive layer in the vertical direction.
10 . The non-volatile memory device as claimed in claim 9 , wherein a height of the bit line isolation layer protrusion in the vertical direction is the same as a height of the common source line conductive layer in the vertical direction.
11 . The non-volatile memory device as claimed in claim 9 , wherein a height of the bit line isolation layer protrusion in the vertical direction is different from a height of the common source line conductive layer in the vertical direction.
12 . The non-volatile memory device as claimed in claim 9 , wherein the common source line conductive layer includes a common source line conductive layer protrusion that protrudes in the vertical direction along a side wall of the bit line isolation layer protrusion.
13 . The non-volatile memory device as claimed in claim 8 , further comprising:
a first insulating layer on the common source line conductive layer and surrounding the first conductive filler and the second conductive filler; and
a second insulating layer surrounding the first insulating layer, penetrating through at least a part of the common source line conductive layer, and on the bit line isolation layer.
14 . A non-volatile memory system, comprising:
a main processor;
a storage device that transmits and receives data for operation of the main processor; and
a non-volatile memory device that stores data,
wherein the non-volatile memory device includes:
a substrate;
an insulating layer on the substrate;
a bit line isolation layer on the insulating layer;
a common source line conductive layer on the bit line isolation layer;
a ferroelectric memory cell on the bit line isolation layer;
a bit line connected to a top of the ferroelectric memory cell; and
a common source line connected to the common source line conductive layer and electrically connected to the ferroelectric memory cell,
wherein the ferroelectric memory cell includes a ferroelectric layer, a channel layer, a first conductive filler connected to the ferroelectric layer and the channel layer and extending in a vertical direction, and a second conductive filler connected to the ferroelectric layer and the channel layer and extending in the vertical direction,
wherein the first conductive filler is connected to the bit line, and
wherein the second conductive filler is connected to the common source line.
15 . The non-volatile memory system as claimed in claim 14 , wherein:
the bit line extends in a first direction that intersects the vertical direction, and
the common source line extends in the first direction.
16 . The non-volatile memory system as claimed in claim 14 , wherein:
the bit line extends in a first direction that intersects the vertical direction, and
the common source line extends in a second direction that intersects the first direction.
17 . The non-volatile memory system as claimed in claim 14 , wherein the bit line isolation layer includes an insulating material.
18 . The non-volatile memory system as claimed in claim 14 , wherein:
the common source line conductive layer includes an opening therein,
the bit line isolation layer includes a bit line isolation layer protrusion that protrudes through the opening in the common source line conductive layer, and
the bit line isolation layer protrusion is connected to the first conductive filler.
19 . The non-volatile memory system as claimed in claim 14 , further comprising a conductive line that is electrically connected to the ferroelectric layer and directly adjacent thereto in a first direction that intersects the vertical direction.
20 . The non-volatile memory system as claimed in claim 19 , further comprising a word line that is electrically connected to the conductive line, and that extends in the first direction.