IP Library Granted Patent US 12666628
Granted Patent B2
US 12666628 · App. 18/179,895 · Granted Jun 23, 2026

Nonvolatile semiconductor storage device and manufacturing method

Inventors: Kensuke Takahashi (Yokkaichi Mie, JP); Daisaburo Takashima (Yokohama Kanagawa, JP); Naoki Kai (Kuwana Mie, JP); Yasumi Ishimoto (Yokkaichi Mie, JP)
Assignee: Kioxia Corporation
H10B63/845H10B63/10H10B63/34
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Quick Facts
Patent No.
US 12666628
App. No.
18/179,895
Granted
Jun 23, 2026
Kind
B2
Abstract

According to one embodiment, a cell block includes memory cells and select transistors. The memory cells correspond are connected in parallel between a local source line and a local bit line. The select transistor is connected between the local bit line and a bit line. The memory cell includes a cell transistor and a resistance change element. A gate of the cell transistor is connected to a word line. The resistance change element is connected to the cell transistor in series between the local source line and the local bit line. Each cell block is configured as a columnar structure penetrating a plurality of conductive films functioning as word lines. The select transistor and the local bit line are connected at a contact portion formed of a material different from a material of the local bit line.

Claims (25)

1 . A nonvolatile semiconductor storage device, comprising:

a plurality of bit lines, each extending in a first direction and spaced from each other in a second direction intersecting the first direction;

a stacked body including a plurality of word line layers stacked one on the other in a third direction intersecting the first and second directions; and

a plurality of cell blocks arrayed in the first and second directions within the stacked body as columnar structures extending in the third direction, each cell block being in a columnar structure with another cell block adjacent in the second direction and having one end connected to a bit line, the adjacent cell block in the columnar structure having one end connected to another bit line, wherein

each cell block includes:

a plurality of memory cells connected in parallel between a local source line and a local bit line in the columnar structure, and

a select transistor connected between the local bit line and the respective bit line of the cell block,

each memory cell includes:

a cell transistor with a gate connected to a respective word line layer within the stacked body, and

a resistance change element that is connected in series with the cell transistor between the local source line and the local bit line, and

the select transistor and the local bit line are connected to one another via a conductive contact formed of a material different than the local bit line.

2 . The nonvolatile semiconductor storage device according to claim 1 , wherein the conductive contact comprises a metal nitride.

3 . The nonvolatile semiconductor storage device according to claim 1 , wherein the conductive contact comprises a metal.

4 . The nonvolatile semiconductor storage device according to claim 3 , wherein the conductive contact is a film having a first portion directly contacting an end of the local bit line and a second portion on an outer perimeter of the first portion and extending in the third direction from the first portion to the select transistor.

5 . The nonvolatile semiconductor storage device according to claim 4 , wherein the second portion has a U-shape in a cross-section orthogonal to the third direction.

6 . The nonvolatile semiconductor storage device according to claim 4 , wherein the first portion entirely covers the end of the local bit line.

7 . The nonvolatile semiconductor storage device according to claim 1 , wherein the conductive contact directly contacts an end of the local bit line and a part of a channel region directly under a gate electrode of the select transistor.

8 . The nonvolatile semiconductor storage device according to claim 1 , wherein the conductive contact has a first portion directly contacting an end of the local bit line and a second portion on an outer perimeter of the first portion and extending in the third direction from the first portion to the select transistor.

9 . The nonvolatile semiconductor storage device according to claim 8 , wherein the second portion has a U-shape in a cross-section orthogonal to the third direction.

10 . The nonvolatile semiconductor storage device according to claim 1 , wherein each resistance change element includes:

a resistance change film extending in the third direction on an outer periphery of the local bit line of the respective cell block of the resistance change element.

11 . The nonvolatile semiconductor storage device according to claim 1 , wherein each columnar structure is an elongated oval shape with one of the respective cell blocks of the columnar structure being at one end of the elongated oval shape and the other of the respective cell blocks being at the other end of the elongated oval shape spaced from the other cell block in a direction orthogonal to the third direction.

12 . The nonvolatile semiconductor storage device according to claim 11 , wherein the local source line is in a middle region of the elongated oval shape between the two ends of the elongated oval shape.

13 . The nonvolatile semiconductor storage device according to claim 12 , wherein the local bit lines of the columnar structure and the local source line are separated from one another by an insulating film including a liner layer.

14 . The nonvolatile semiconductor storage device according to claim 1 , wherein one end of the resistance change element is connected to the local bit line and the other end of the resistance change element is connected to the cell transistor.