Semiconductor device including supporter

1 . A semiconductor device comprising:

a substrate;

a plurality of lower electrodes on the substrate and arranged in a honeycomb structure; and

a supporter connecting the plurality of lower electrodes to each other, the supporter having a plurality of supporter holes defined therein, and the plurality of supporter holes exposing at least a portion of each of the plurality of lower electrodes,

wherein the supporter includes

a plurality of first extensions and a plurality of second extensions that define the plurality of supporter holes,

the plurality of first extensions extending in a first direction, and the plurality of first extensions being arranged in a second direction perpendicular to the first direction, and

the plurality of second extensions extending in the second direction, the plurality of second extensions intersecting the plurality of first extensions, and the plurality of second extensions being arranged in the first direction,

wherein each of the plurality of first extensions has a first sidewall and a second sidewall opposite to each other in the second direction,

wherein each of the plurality of second extensions has a third sidewall and a fourth sidewall opposite to each other in the first direction, and

wherein each of the first sidewall, the second sidewall, the third sidewall and the fourth sidewall includes a convex portion and a concave portion between adjacent lower electrodes from among the plurality of lower electrodes.

2 . The semiconductor device of claim 1 , wherein the plurality of lower electrodes include a first lower electrode, a second lower electrode, a third lower electrode and a fourth lower electrode arranged in a quadrangle manner,

wherein a first supporter hole of the plurality of supporter holes exposes at least a portion of each of the first lower electrode, the second lower electrode, the third lower electrode and the fourth lower electrode,

wherein the first lower electrode and the second lower electrode are adjacent to each other in the first direction,

wherein the third lower electrode and the fourth lower electrode are adjacent to each other in the first direction,

wherein the second lower electrode and the third lower electrode are adjacent to each other in a third direction, the third direction being between the first direction and the second direction.

3 . The semiconductor device of claim 1 , wherein the plurality of lower electrodes include a first lower electrode, a second lower electrode, a third lower electrode and a fourth lower electrode arranged in a quadrangle manner,

wherein a first supporter hole of the plurality of supporter holes exposes at least a portion of each of the first lower electrode, the second lower electrode, the third lower electrode and the fourth lower electrode,

wherein an area by which the first lower electrode is exposed through the plurality of supporter holes is different from each of an area by which the second lower electrode is exposed through the plurality of supporter holes, an area by which the third lower electrode is exposed through the plurality of supporter holes, and an area by which the fourth lower electrode is exposed through the plurality of supporter holes.

4 . The semiconductor device of claim 1 , wherein each of the plurality of lower electrodes includes:

a first film defining a trench; and

a second film on the first film, the second film filling the trench.

5 . The semiconductor device of claim 4 , wherein a material of the second film is different from a material of the first film.

6 . The semiconductor device of claim 4 , wherein a vertical level of a top face of the first film is higher than a vertical level of a top face of the second film.

7 . The semiconductor device of claim 4 , wherein a top face of the first film is coplanar with a top face of the second film.

8 . The semiconductor device of claim 4 , wherein the second film includes:

a third film filling a portion of the trench; and

a fourth film on the third film, the fourth film filling a remaining portion of the trench.

9 . A semiconductor device comprising:

a substrate;

a plurality of lower electrodes on the substrate and arranged in a honeycomb structure; and

a supporter connecting the plurality of lower electrodes to each other, the supporter having a plurality of supporter holes defined therein, each of the plurality of supporter holes exposing at least a portion of at least one of the plurality of lower electrodes,

wherein the supporter includes

a plurality of first extensions extending in a first direction, and the plurality of first extensions being arranged in a second direction perpendicular to the first direction; and

a plurality of second extensions extending in the second direction, the plurality of second extensions intersecting the plurality of first extensions, and the plurality of second extensions being arranged in the first direction,

wherein the plurality of supporter holes include a first supporter hole,

wherein the plurality of first extensions include a first sub-extension and a second sub-extension defining the first supporter hole,

wherein the plurality of second extensions include a third sub-extension and a fourth sub-extension defining the first supporter hole, and

wherein at least one of the first sub-extension, the second sub-extension, the third sub-extension and the fourth sub-extension has a convex portion toward the first supporter hole.

10 . The semiconductor device of claim 9 , wherein the plurality of lower electrodes include a first lower electrode, a second lower electrode, a third lower electrode and a fourth lower electrode adjacent to each other around a center of the first supporter hole,

wherein the first lower electrode is in contact with the first sub-extension and the third sub-extension,

wherein the second lower electrode is in contact with the first sub-extension and the fourth sub-extension,

wherein the third lower electrode is in contact with the second sub-extension and the third sub-extension,

wherein the fourth lower electrode is in contact with the second sub-extension and the fourth sub-extension,

wherein a point at which the first lower electrode and the first sub-extension contact each other and a point at which the second lower electrode and the first sub-extension contact each other are not in a same line extending in the first direction.

11 . The semiconductor device of claim 9 , wherein the plurality of lower electrodes include a first lower electrode, a second lower electrode, a third lower electrode and a fourth lower electrode adjacent to each other around a center of the first supporter hole,

wherein the first lower electrode is in contact with the first sub-extension and the third sub-extension,

wherein the second lower electrode is in contact with the first sub-extension and the fourth sub-extension,

wherein the third lower electrode is in contact with the second sub-extension and the third sub-extension,

wherein the fourth lower electrode is in contact with the second sub-extension and the fourth sub-extension,

wherein a point at which the third lower electrode and the second sub-extension contact each other and a point at which the fourth lower electrode and the second sub-extension contact each other are not in a same line extending in the first direction.

12 . The semiconductor device of claim 9 , wherein the plurality of lower electrodes include a first lower electrode, a second lower electrode, a third lower electrode and a fourth lower electrode adjacent to each other around a center of the first supporter hole,

wherein the first lower electrode is in contact with the first sub-extension and the third sub-extension,

wherein the second lower electrode is in contact with the first sub-extension and the fourth sub-extension,

wherein the third lower electrode is in contact with the second sub-extension and the third sub-extension,

wherein the fourth lower electrode is in contact with the second sub-extension and the fourth sub-extension,

wherein a spacing between the first sub-extension and a first extension line extending through a center of the first lower electrode and a center of the second lower electrode is different from a spacing between the second sub-extension and a second extension line extending through a center of the third lower electrode and a center of the fourth lower electrode.

13 . The semiconductor device of claim 9 , wherein each of sidewalls of the first sub-extension, the second sub-extension, the third sub-extension and the fourth sub-extension of the supporter defining the first supporter hole is flat.

14 . The semiconductor device of claim 9 , wherein each of the plurality of lower electrodes includes a first film and a second film including different materials.

15 . The semiconductor device of claim 9 , wherein the plurality of lower electrodes include a first lower electrode, a second lower electrode, a third lower electrode and a fourth lower electrode adjacent to each other around a center of the first supporter hole,

wherein each of the plurality of supporter holes exposes at least a portion of one of the first lower electrode, the second lower electrode, the third lower electrode and the fourth lower electrode.

16 . A semiconductor device comprising:

a substrate;

a plurality of lower electrodes on the substrate and arranged in a honeycomb structure; and

a supporter connecting the plurality of lower electrodes to each other, the supporter having a plurality of supporter holes defined therein, and the plurality of supporter holes exposing at least a portion of each of the plurality of lower electrodes,

wherein the supporter includes

a plurality of first extensions extending in a first direction, and the plurality of first extensions being arranged in a second direction perpendicular to the first direction; and

a plurality of second extensions extending in the second direction, the plurality of second extensions intersecting the plurality of first extensions, and the plurality of second extensions being arranged in the first direction,

wherein the plurality of lower electrodes include a first lower electrode, a second lower electrode, a third lower electrode and a fourth lower electrode arranged in a quadrangle manner,

wherein a first supporter hole of the plurality of supporter holes exposes at least a portion of each of the first lower electrode, the second lower electrode, the third lower electrode and the fourth lower electrode,

wherein the first lower electrode and the second lower electrode are adjacent to each other in a third direction, the third direction being between the first direction and the second direction, and

wherein the third lower electrode and the fourth lower electrode are respectively adjacent to the first lower electrode and the second lower electrode in the first direction.

17 . The semiconductor device of claim 16 , wherein each of sidewalls of the supporter defining the plurality of supporter holes has a wavy shape.

18 . The semiconductor device of claim 16 , wherein each of sidewalls of the supporter defining the plurality of supporter holes is flat.

19 . The semiconductor device of claim 16 , wherein each of the plurality of lower electrodes includes:

a first film defining a trench; and

a second film on the first film, the second film filling the trench.

20 . The semiconductor device of claim 16 , wherein each of the plurality of lower electrodes includes:

a first film defining a trench, and

a second film on the first film, the second film filling a portion of the trench,

the semiconductor device further comprises

a capacitor dielectric film filling a remaining portion of the trench, the capacitor dielectric film extending along a profile of a corresponding lower electrode from among the plurality of lower electrodes and a profile of the supporter, and

an upper electrode on the capacitor dielectric film.