IP Library › Granted Patent US 12666639
Granted Patent B2
US 12666639 · App. 18/361,776 · Granted Jun 23, 2026

Gate all-around laterally diffused metal-oxide semiconductor field effect transistor

Inventor: Qing Liu (Irvine, CA)
Assignee: Avago Technologies International Sales Pte. Limited
H10D30/43H10D30/6735H10D62/121H10D62/151H10D62/371
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Quick Facts
Patent No.
US 12666639
App. No.
18/361,776
Granted
Jun 23, 2026
Kind
B2
Abstract

A gate all-around laterally diffused metal-oxide semiconductor device is provided. An apparatus includes a substrate, two or more first sheets disposed on the substrate, a gate disposed on the substrate and at least part of the two or more first sheets, and a first epitaxial layer disposed on the substrate on a first side of the gate and at least part of the two or more first sheets. At least part of the two or first more sheets extends longitudinally from the gate to the first epitaxial layer.

Claims (41)

1 . An apparatus comprising:

a substrate;

two or more first sheets disposed on the substrate;

a gate disposed on the substrate and at least part of the two or more first sheets;

a first epitaxial layer disposed on the substrate on a first side of the gate and at least part of the two or more first sheets, wherein at least part of the two or first more sheets extends longitudinally from the gate to the first epitaxial layer;

two or more second sheets disposed on the substrate on a second side of the gate; and

a second epitaxial layer disposed on the second side of the gate, and further disposed, at least in part, over the two or more second sheets;

wherein the substrate further comprises a shallow trench isolation region disposed between the second epitaxial layer and gate, wherein a lightly-doped drain is formed within the substrate under the shallow trench isolation region, between the second epitaxial layer and the gate.

2 . The apparatus of claim 1 , wherein each first sheet of the two or more first sheets are separated by respective dielectric spacers.

3 . The apparatus of claim 1 , wherein the two or more first sheets are further disposed, at least in part, within the first epitaxial layer, wherein the first epitaxial layer is grown over the two or more first sheets.

4 . The apparatus of claim 1 , wherein each second sheet of the two or more second sheets are separated from each other by respective dielectric spacers.

5 . The apparatus of claim 1 , wherein each respective first sheet of the two or more first sheets and each respective second sheet of the two or more second sheets are connected as part of the same sheet, wherein each sheet is continuous from the first epitaxial layer to the second epitaxial layer, and wherein the two or more first sheets and two or more second sheets are respectively parts of two or more channels coupling the first epitaxial layer and second epitaxial layer.

6 . The apparatus of claim 5 , wherein the two or more channels form at least part of a lightly-doped drain.

7 . The apparatus of claim 5 , wherein the two or more channels are disposed on the substrate.

8 . The apparatus of claim 1 , wherein the apparatus comprises a semiconductor die.

9 . The apparatus of claim 1 , further comprising one or more dummy dielectric layers disposed on the substrate, wherein the two or more first sheets is configured to extend into the one or more field dielectric layers.

10 . The apparatus of claim 1 , wherein the two or more first sheets are part of a first nanosheet stack.

11 . A semiconductor die comprising:

a substrate;

a laterally-diffused metal-oxide semiconductor transistor disposed on the substrate, the laterally-diffused metal-oxide semiconductor transistor comprising:

a gate comprising a gate dielectric layer disposed on the substrate;

a source comprising a first epitaxial layer disposed on the substrate on a first side of the gate dielectric layer; and

two or more first sheets disposed on the substrate, wherein at least part of the two or more first sheets extends longitudinally from the gate dielectric layer to the first epitaxial layer;

two or more second sheets disposed on the substrate on a second side of the gate; and

a second epitaxial layer disposed on the second side of the gate, and further disposed, at least in part, over the two or more second sheets;

wherein the substrate further comprises a shallow trench isolation region disposed between the second epitaxial layer and gate, wherein a lightly-doped drain is formed within the substrate under the shallow trench isolation region, between the second epitaxial layer and the gate.

12 . The semiconductor die of claim 11 , wherein the two or more first sheets are further disposed, at least in part, within the first epitaxial layer, wherein the first epitaxial layer is grown over the two or more first sheets.

13 . The semiconductor die of claim 11 , wherein each respective first sheet of the two or more first sheets and each respective second sheet of the two or more second sheets are connected as part of the same sheet, wherein each sheet is continuous from the first epitaxial layer to the second epitaxial layer, and wherein the two or more first sheets and two or more second sheets are respectively parts of two or more channels coupling the first epitaxial layer and second epitaxial layer.

14 . The semiconductor die of claim 13 , wherein the two or more channels are disposed on the substrate, and wherein between the gate dielectric layer and the second epitaxial layer, the two or more channels form at least part of a lightly doped drain region.

15 . The semiconductor die of claim 11 , wherein each first sheet of the two or more first sheets are separated by respective dielectric spacers.

16 . A semiconductor device comprising:

a gate disposed on a substrate and at least part of the two or more first sheets;

a source comprising a first epitaxial layer disposed on the substrate on a first side of the gate and at least part of the two or more first sheets; and

two or more first sheets disposed on the substrate, wherein at least part of the two or more first sheets extends longitudinally from the gate to the first epitaxial layer;

two or more second sheets disposed on the substrate on a second side of the gate; and

a second epitaxial layer disposed on the second side of the gate, and further disposed, at least in part, over the two or more second sheets;

wherein the substrate further comprises a shallow trench isolation region disposed between the second epitaxial layer and gate, wherein a lightly-doped drain is formed within the substrate under the shallow trench isolation region, between the second epitaxial layer and the gate.

17 . The semiconductor device of claim 16 , wherein the two or more first sheets are further disposed, at least in part, within the first epitaxial layer, wherein the first epitaxial layer is grown over the two or more first sheets.

18 . The semiconductor device of claim 16 wherein each second sheet of the two or more second sheets are separated from each other by a dielectric spacer.

19 . The semiconductor device of claim 16 , wherein each respective first sheet of the two or more first sheets and each respective second sheet of the two or more second sheets are connected as part of the same sheet, wherein each sheet is continuous from the first epitaxial layer to the second epitaxial layer, and wherein the two or more first sheets and two or more second sheets are respectively parts of two or more channels coupling the first epitaxial layer and second epitaxial layer.

20 . The semiconductor device of claim 19 , wherein the two or more channels are disposed, at least in part, over the substrate, and wherein the two or more channels form at least part of a lightly doped drain.