IP Library Granted Patent US 12666643
Granted Patent B2
US 12666643 · App. 18/327,200 · Granted Jun 23, 2026

Method to implant p-type and/or n-type rings in a semiconductor device

Inventors: Yu-Chun Li (New Taipei City, TW); Thomas S. Chung (Merrimack, NH); Maxim Klebanov (Palm Coast, FL); Chung C. Kuo (Manchester, NH); James M. McClay (Dudley, MA); Robert A. Wilson (Charlton, MA)
Assignee: Allegro MicroSystems, LLC
H10D30/65H10D30/0281H10D62/152H10D64/112H10D64/117H10D64/513
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Quick Facts
Patent No.
US 12666643
App. No.
18/327,200
Granted
Jun 23, 2026
Kind
B2
Abstract

According to one aspect of the present disclosure, a semiconductor device includes a substrate having a first type dopant. In some embodiments, the semiconductor device also includes an epitaxial layer above the substrate, having a second type dopant and a top region. In some embodiments, the semiconductor device also includes a trench in the top region of the epitaxial layer; at least one doped ring implanted in the epitaxial layer below the trench; and a dielectric material filling within the trench. In some embodiments, there is a twelve-sided body tie in the epitaxial layer, wherein the sides of the twelve-sided body tie are not all equal to each other.

Claims (39)

1 . A semiconductor device, comprising:

a substrate having a first type dopant;

an epitaxial layer above the substrate, having a second type dopant and a top region;

a body tie in the epitaxial layer, wherein the body tie has a plurality of sides not equal to each other;

a trench in the top region of the epitaxial layer;

at least one doped ring implanted in the epitaxial layer below the trench; and

a dielectric material filling within the trench.

2 . The semiconductor device of claim 1 , further comprising an oxide and a gate structure on the dielectric material and the epitaxial layer.

3 . The semiconductor device of claim 1 , wherein the at least one doped ring comprises at least two doped rings having different doping densities from each other.

4 . The semiconductor device of claim 1 , wherein the at least one doped ring is a n-type ring.

5 . The semiconductor device of claim 1 , wherein the at least one doped ring is a p-type ring.

6 . The semiconductor device of claim 1 , wherein the first type dopant is a p-type dopant and wherein the second type dopant is a n-type dopant.

7 . The semiconductor device of claim 1 , wherein the at least one doped ring comprises at least one doped ring with a n-type dopant and at least doped ring with a p-type dopant.

8 . The semiconductor device of claim 1 , wherein the substrate and/or the epitaxial layer comprise a crystalline semiconductor material.

9 . The semiconductor device of claim 8 , wherein the crystalline semiconductor material comprises at least one of Si, Ge, AlGaN, InGaAs, GaAs, InAs, InP, AlN, InN, GaN, SiC, and/or SiGe.

10 . The semiconductor device of claim 1 , wherein the body tie is twelve-sided and formed from a scalene octagon and two elongated rectangles.

11 . The semiconductor device of claim 1 , wherein the at least one doped ring comprises at least two doped rings implanted at different depths in the epitaxial layer.

12 . A semiconductor device, comprising:

a substrate having a first type dopant;

an epitaxial layer above the substrate, having a second type dopant and a top region;

a twelve-sided body tie in the epitaxial layer, wherein sides of the twelve-sided body tie are not all equal to each other;

a trench in the top region of the epitaxial layer;

at least one doped ring implanted in the epitaxial layer below the trench;

a dielectric material filling within the trench; and

an oxide and a gate structure on the dielectric material.

13 . The semiconductor device of claim 12 , wherein the twelve-sided body tie has a width of 0.58 μm.

14 . The semiconductor device of claim 12 , wherein the twelve-sided body tie has a diagonal width of 0.523 μm.

15 . The semiconductor device of claim 12 , wherein the at least one doped ring has different doping densities.

16 . The semiconductor device of claim 12 , wherein the at least one doped ring is n-type and/or p-type.

17 . The semiconductor device of claim 12 , wherein the first type dopant is a p-type dopant and wherein the second type dopant is a n-type dopant.

18 . A semiconductor device, comprising:

a substrate having a first type dopant;

an epitaxial layer above the substrate, having a second type dopant and a top region;

a twelve-sided body tie in the epitaxial layer, wherein sides of the twelve-sided body tie are not all equal to each other;

a dielectric material filling; and

an oxide and a gate structure on top of the epitaxial layer.

19 . The semiconductor device of claim 18 , wherein the twelve-sided body tie has a width of 0.58 μm.

20 . The semiconductor device of claim 18 , wherein the twelve-sided body tie has a diagonal width of 0.523 μm.

21 . The semiconductor device of claim 18 , wherein the first type dopant is a p-type dopant and wherein the second type dopant is a n-type dopant.