Thin film transistor substrate and display apparatus comprising the same

1 . A thin film transistor substrate comprising:

a light shielding layer including a conductive material;

an active layer disposed on the light shielding layer and overlapping the light shielding layer;

a source electrode connected to a first side of the active layer and connected to the light shielding layer;

a drain electrode connected to a second side of the active layer;

a gate electrode overlapping the active layer; and

a connection layer disposed between the light shielding layer and the active layer, and electrically connecting the light shielding layer with the active layer,

wherein the connection layer is disconnected from the gate electrode and overlaps the gate electrode.

2 . The thin film transistor substrate according to claim 1 , wherein an upper surface of the connection layer is in contact with a lower surface of the active layer, and

wherein a lower surface of the connection layer is in contact with an upper surface of the light shielding layer.

3 . The thin film transistor substrate according to claim 1 , further comprising:

a buffer layer disposed between the light shielding layer and the active layer; and

a gate insulating layer disposed between the active layer and the gate electrode,

wherein a thickness of the buffer layer is thinner than a thickness of the gate insulating layer.

4 . The thin film transistor substrate according to claim 1 , wherein the source electrode includes a first part in contact with an upper surface of the first side of the active layer and a second part in contact with an upper surface of the light shielding layer.

5 . The thin film transistor substrate according to claim 1 , wherein the connection layer includes a same material as the active layer, or the light shielding layer.

6 . The thin film transistor substrate according to claim 1 , further comprising a buffer layer between the active layer and the light shielding layer,

wherein the connection layer penetrates through the buffer layer.

7 . The thin film transistor substrate according to claim 1 , wherein the connection layer is composed of a plurality of connection layers spaced apart from each other.

8 . The thin film transistor substrate according to claim 7 , wherein the active layer includes a channel overlapping the gate electrode, a first connection part disposed on a first side of the channel and connected to the source electrode, and a second connection part disposed on a second side of the channel and connected to the drain electrode, and

wherein the plurality of connection layers include at least one connection layer connecting the light shielding layer with the channel, and at least one other connection layer connecting the light shielding layer with the first connection part.

9 . The thin film transistor substrate according to claim 1 , wherein the active layer includes a channel overlapping the gate electrode, a first connection part disposed on a first side of the channel and connected to the source electrode, and a second connection part disposed on a second side of the channel and connected to the drain electrode, and

wherein a portion of the connection layer connects the light shielding layer with the channel, and an another portion of the connection layer connects the light shielding layer with the first connection part.

10 . The thin film transistor substrate according to claim 9 , wherein a first end of the another portion of the connection layer is aligned with a first end of the first connection part, or is in contact with the source electrode.

11 . The thin film transistor substrate according to claim 1 , wherein the active layer includes a channel overlapping the gate electrode, a first connection part disposed on a first side of the channel and connected to the source electrode, and a second connection part disposed on a second side of the channel and connected to the drain electrode, and

wherein the connection layer is connected to the channel.

12 . The thin film transistor substrate according to claim 11 , wherein the connection layer is located closer to the second connection part than to the first connection part.

13 . The thin film transistor substrate according to claim 11 , wherein the connection layer is spaced apart from the second connection part without contacting the second connection part.

14 . A thin film transistor substrate comprising:

an active layer;

a source electrode connected to a first side of the active layer;

a drain electrode connected to a second side of the active layer; and

a gate electrode overlapping the active layer,

wherein a path of electrons from the source electrode to the drain electrode includes a first path from the source electrode to the drain electrode via the active layer and a second path from the source electrode to the drain electrode through the active layer via a third connection part including a connection layer,

wherein the connection layer is disconnected from the gate electrode and overlaps the gate electrode.

15 . The thin film transistor substrate according to claim 14 , wherein the third connection part includes a light shielding layer connected to the source electrode and overlapping the active layer, and the connection layer connecting the light shielding layer with the active layer.

16 . The thin film transistor substrate according to claim 15 , wherein the active layer includes a channel overlapping the gate electrode, a first connection part disposed on a first side of the channel and connected to the source electrode, and a second connection part disposed on a second side of the channel and connected to the drain electrode, and

wherein the connection layer is not in contact with the second connection part.

17 . A display apparatus comprising:

a plurality of pixels on a substrate, each pixel including a driving thin film transistor,

wherein the driving thin film transistor comprises:

a light shielding layer on the substrate and including a conductive material;

an active layer overlapping the light shielding layer;

a source electrode electrically connected to at least one of a first side of the active layer and the light shielding layer;

a drain electrode electrically connected to a second side of the active layer;

a gate electrode overlapping the active layer; and

a connection layer between the light shielding layer and the active layer, and connecting the light shielding layer to the active layer,

wherein the connection layer is disconnected from the gate electrode and overlaps the gate electrode.

18 . The display apparatus according to claim 17 , further comprising a switching thin film transistor including an active layer disposed on a same layer as the active layer of the driving thin film transistor,

wherein a portion of a lower surface of the active layer of the driving thin film transistor is in contact with the connection layer, and another portion of the lower surface of the active layer of the driving thin film transistor is in contact with a buffer layer between the light shielding layer and the active layer of the driving thin film transistor, and

wherein an entire lower surface of the active layer of the switching thin film transistor is in contact with the buffer layer.

19 . The display apparatus according to claim 17 , further comprising:

a connector between the light shielding layer and the active layer, and connecting the light shielding layer to at least one of the first side of the active layer and the source electrode.

20 . The display apparatus according to claim 19 , wherein the source electrode is connected to the connector, and the connector is connected to both the first side of the active layer and the source electrode.