IP Library Granted Patent US 12666662
Granted Patent B2
US 12666662 · App. 18/124,649 · Granted Jun 23, 2026

Semiconductor device

Inventors: Chang Ju Lee (Bucheon-si, KR); Dong Kook Son (Bucheon-si, KR)
Assignee: POWER MASTER SEMICONDUCTOR CO., LTD.
H10D62/107H10D30/665H10D62/111H10P30/22
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Quick Facts
Patent No.
US 12666662
App. No.
18/124,649
Granted
Jun 23, 2026
Kind
B2
Abstract

A semiconductor device is provided. A semiconductor device includes: a first semiconductor layer having an N conductivity type; and a second semiconductor layer formed on the first semiconductor layer and including an active region, a frame region, and a termination region, wherein the active region may include a plurality of first P pillars and first N pillars formed between the plurality of first P pillars, the frame region includes a plurality of second P pillars and second N pillars formed between the plurality of second P pillars, the termination region may include a first surface termination layer having a P conductivity type and formed to extend in a first direction, a second surface termination layer having an N conductivity type and formed to extend in the first direction under the first surface termination layer, a first low-concentration termination layer having a P conductivity type and formed to extend in the first direction under the second surface termination layer, and a second low-concentration termination layer having an N conductivity type and formed in the first direction under the first low-concentration termination layer.

Claims (17)

1 . A semiconductor device comprising:

a first semiconductor layer having an N conductivity type; and

a second semiconductor layer formed on the first semiconductor layer and including an active region, a frame region, and a termination region,

wherein the active region includes a plurality of first P pillars and first N pillars formed between the plurality of first P pillars, and the frame region includes a plurality of second P pillars and second N pillars formed between the plurality of second P pillars,

the termination region includes a first surface termination layer having a P conductivity type and formed to extend in a first direction, a second surface termination layer having an N conductivity type and formed to extend in the first direction under the first surface termination layer, a first low-concentration termination layer having a P conductivity type and formed to extend in the first direction under the second surface termination layer, and a second low-concentration termination layer having an N conductivity type and formed in the first direction under the first low-concentration termination layer, and

the first surface termination layer is formed on a top surface of the second semiconductor layer in the termination region.

2 . The semiconductor device of claim 1 , wherein

the doping concentration of the first low-concentration termination layer and the doping concentration of the second low-concentration termination layer are lower than the doping concentration of the first surface termination layer or the doping concentration of the second surface termination layer.

3 . The semiconductor device of claim 1 , wherein

the second surface termination layer, the first low-concentration termination layer, and the second low-concentration termination layer are covered by the first surface termination layer.

4 . The semiconductor device of claim 1 , wherein

the thicknesses of the first low-concentration termination layer and the thickness of the second low-concentration termination layer are thicker than the thickness of the first surface termination layer or the thickness of the second surface termination layer.

5 . The semiconductor device of claim 1 , wherein

the semiconductor device is manufactured using a mask layer so that the distance between the centers of the first pillar mask patterns in the termination region is smaller than the distance between the centers of the first pillar mask patterns in the active region, and the distance between the centers of the second pillar mask patterns in the termination region is smaller than the distance between the centers of the second pillar mask pattern in the active region.

6 . The semiconductor device of claim 1 , wherein

the doping concentration of the second P pillar increases as it approaches the upper end of the second semiconductor layer and decreases as it approaches the lower end of the second semiconductor layer, and

the doping concentration of the second N pillar increases as it approaches the upper end of the second semiconductor layer and decreases as it approaches the lower end of the second semiconductor layer.