Semiconductor device with source region having multiple portions with different impulity concentrations and method for the same
View Patent ↗According to one embodiment, a semiconductor device includes a first electrode, first to fourth semiconductor regions, a gate electrode, and a second electrode. The third semiconductor region is located on a portion of the second semiconductor region. The fourth semiconductor region includes a first portion positioned on the third semiconductor region and a second portion arranged with the first portion in a second direction. A first-conductivity-type impurity concentration of the first portion is less than a first-conductivity-type impurity concentration of the second portion. The gate electrode faces the second semiconductor region via a gate insulating layer in the second direction. The second electrode is located on the second and fourth semiconductor regions. The second electrode contacts the first and second portions. The second electrode includes a connection part that contacts the third semiconductor region and the portion of the second semiconductor region in the second direction.
1 . A semiconductor device, comprising:
a first electrode;
a first semiconductor region located on the first electrode, the first semiconductor region being of a first conductivity type;
a second semiconductor region located on the first semiconductor region, the second semiconductor region being of a second conductivity type;
a third semiconductor region located on a portion of the second semiconductor region, the third semiconductor region being of the second conductivity type, a second-conductivity-type impurity concentration of the third semiconductor region being greater than a second-conductivity-type impurity concentration of the second semiconductor region;
a fourth semiconductor region of the first conductivity type,
the fourth semiconductor region including
a first portion positioned on the third semiconductor region, an upper surface of the first portion being oblique to a first direction and a second direction, the first direction being from the first electrode toward the first semiconductor region, the second direction being perpendicular to the first direction, and
a second portion aligned with the first portion in the second direction, a first-conductivity-type impurity concentration of the first portion being less than a first-conductivity-type impurity concentration of the second portion, an upper surface of the second portion being along the second direction;
a gate electrode facing the second semiconductor region via a gate insulating layer in the second direction; and
a second electrode located on the second and fourth semiconductor regions, the second electrode contacting the first and second portions, the second electrode including a connection part, the connection part contacting the third semiconductor region and the portion of the second semiconductor region in the second direction, the first portion being positioned between the connection part and the second portion in the second direction.
2 . The device according to claim 1 , further comprising:
a fifth semiconductor region located between the second semiconductor region and the connection part in the first direction, the fifth semiconductor region being of the second conductivity type;
a second-conductivity-type impurity concentration of the fifth semiconductor region being greater than the second-conductivity-type impurity concentration of the second semiconductor region,
the third semiconductor region being separated from the fifth semiconductor region.
3 . The device according to claim 2 , wherein
the second-conductivity-type impurity concentration of the third semiconductor region is less than the second-conductivity-type impurity concentration of the fifth semiconductor region.
4 . The device according to claim 2 , wherein
the fifth semiconductor region has a peak of the second-conductivity-type impurity concentration at a first position in the first direction,
the third semiconductor region has a peak of the second-conductivity-type impurity concentration at a second position in the first direction, and
a first distance in the first direction from an interface between the fifth semiconductor region and the connection part to the first position is less than a second distance in the first direction from an upper surface of the fourth semiconductor region to the second position.
5 . The device according to claim 1 , wherein
a lower end of the first portion is positioned lower than a lower end of the second portion.
6 . The device according to claim 1 , wherein
the third semiconductor region is located around the connection part along a first plane perpendicular to the first direction.
7 . A semiconductor device, comprising:
a first electrode;
a first semiconductor region located on the first electrode, the first semiconductor region being of a first conductivity type;
a second semiconductor region located on the first semiconductor region, the second semiconductor region being of a second conductivity type;
a third semiconductor region located on a portion of the second semiconductor region, the third semiconductor region being of the second conductivity type, a second-conductivity-type impurity concentration of the third semiconductor region being greater than a second-conductivity-type impurity concentration of the second semiconductor region;
a fourth semiconductor region of the first conductivity type, the fourth semiconductor region including
a first portion positioned on the third semiconductor region, an upper surface of the first portion being oblique to a first direction and a second direction, the first direction being from the first electrode toward the first semiconductor region, the second direction being perpendicular to the first direction, and
a second portion aligned with the first portion in the second direction, a first-conductivity-type impurity concentration of the first portion being less than a first-conductivity-type impurity concentration of the second portion, an upper surface of the second portion being along the second direction;
a gate electrode facing the second semiconductor region via a gate insulating layer in the second direction;
a second electrode located on the second and fourth semiconductor regions, the second electrode including a connection part, the connection part contacting the third semiconductor region and the portion of the second semiconductor region in the second direction, the first portion being positioned between the connection part and the second portion in the second direction; and
a fifth semiconductor region located between the second semiconductor region and the connection part in the first direction, the fifth semiconductor region being separated from the third semiconductor region, the fifth semiconductor region being of the second conductivity type, a second-conductivity-type impurity concentration of the fifth semiconductor region being greater than the second-conductivity-type impurity concentration of the second semiconductor region,
a first distance from an interface between the fifth semiconductor region and the connection part to a peak position of the second-conductivity-type impurity concentration of the fifth semiconductor region in the first direction being less than a second distance from an upper surface of the fourth semiconductor region to a peak position of the second-conductivity-type impurity concentration of the third semiconductor region in the first direction.
8 . The device according to claim 1 , wherein
the first portion contacts the second electrode, and
the second portion contacts the gate insulating layer.
9 . The device according to claim 1 , wherein
the first portion is positioned between the third semiconductor region and a portion of the second electrode in the first direction.
10 . The device according to claim 1 , wherein
the fourth semiconductor region includes a third portion,
the first-conductivity-type impurity concentration of the first portion is less than a first-conductivity-type impurity concentration of the second portion, and
the second portion is positioned between the first portion and the third portion in the second direction.
11 . The device according to claim 10 , further comprising an insulating layer,
at least a portion of the insulating layer being positioned directly above the third portion,
a portion of the second electrode being positioned directly above the second portion.
12 . The device according to claim 1 , wherein
a thickness of the first portion in the first direction is less than a thickness of the second portion in the first direction.
13 . The device according to claim 7 , wherein
the first portion contacts the second electrode, and
the second portion contacts the gate insulating layer.
14 . The device according to claim 7 , wherein
the first portion is positioned between the third semiconductor region and a portion of the second electrode in the first direction.
15 . The device according to claim 7 , wherein
the fourth semiconductor region includes a third portion,
the first-conductivity-type impurity concentration of the first portion is less than a first-conductivity-type impurity concentration of the second portion, and
the second portion is positioned between the first portion and the third portion in the second direction.
16 . The device according to claim 15 , further comprising an insulating layer,
at least a portion of the insulating layer being positioned directly above the third portion,
a portion of the second electrode being positioned directly above the second portion.
17 . The device according to claim 7 , wherein
a thickness of the first portion in the first direction is less than a thickness of the second portion in the first direction.