Semiconductor structure with nitrided inner spacers and method for manufacturing the same
View Patent ↗A semiconductor structure includes a channel structure, a gate structure, two source/drain features, and a plurality of inner spacers. The channel structure includes a plurality of channel features which are spaced apart from each other. The gate structure is disposed to surround the channel features. The source/drain features are disposed at two opposite sides of the channel structure such that each of the channel features interconnects the source/drain features. Each of the inner spacers is disposed to separate the gate structure from a corresponding one of the source/drain features. Each of the inner spacers includes an inner spacer body and a lateral nitrided portion. The lateral nitrided portion is in direct contact with the corresponding one of the source/drain features and has a nitrogen content greater than that of the inner spacer body.
1 . A method for manufacturing a semiconductor structure, comprising:
forming a patterned stack portion including channel features and sacrificial features which are disposed to alternate with the channel features;
replacing end portions of the sacrificial features with inner spacers, such that each of the inner spacers includes a lateral portion and an inner spacer body disposed between the lateral portion and a corresponding one of the sacrificial features;
performing a treating process so as to convert the lateral portion of one of the inner spacers into a lateral nitrided portion which has a nitrogen content greater than a nitrogen content of the inner spacer body of the one of the inner spacers; and
forming two source/drain features at two opposite sides of the patterned stack portion such that each of the channel features interconnects the two source/drain features, and such that the lateral nitrided portion of the one of the inner spacers interfaces a corresponding one of the two source/drain features,
wherein
the treating process is a process which introduces nitrogen into the one of the inner spacers so as to convert the lateral portion of the one of the inner spacers into the lateral nitrided portion which has a first thickness, and
during introduction of the nitrogen into the one of the inner spacers, the nitrogen is further introduced into an end portion of one of the channel features such that the end portion of the one of the channel features is converted into a nitrogen-introduced end portion which has a second thickness smaller than the first thickness.
2 . The method of claim 1 , wherein the treating process is performed by a plasma process using a nitrogen-containing plasma.
3 . The method of claim 1 ,
further comprising: before forming the two source/drain features, performing a removing process to remove the nitrogen-introduced end portion of the one of the channel features, while the lateral nitrided portion of the one of the inner spacers is partially retained.
4 . The method of claim 3 , wherein, after the removing process, the nitrogen content of the lateral nitrided portion of the one of the inner spacers is greater than a nitrogen content of a remaining portion of the one of the channel features.
5 . The method of claim 1 , wherein the nitrogen content of the lateral nitrided portion of the one of the inner spacers ranges from 10 atomic % to 45 atomic %.
6 . The method of claim 1 , wherein the lateral nitrided portion of the one of the inner spacers includes silicon and nitrogen, a ratio of nitrogen atoms to silicon atoms ranging from 0.33 to 1.5.
7 . The method of claim 1 , wherein the inner spacer body of the one of the inner spacers has a density ranging from 1.6 g/cm 3 to 2.3 g/cm 3 .
8 . A method for manufacturing a semiconductor structure, comprising:
forming a stack portion including a channel feature and a sacrificial feature disposed beneath the channel feature;
forming a dummy gate portion on the stack portion;
forming a gate spacer on the stack portion and at a side of the dummy gate portion;
patterning the stack portion to form a source/drain recess in the stack portion;
replacing an end portion of the sacrificial feature with an inner spacer through the source/drain recess;
treating the inner spacer and the gate spacer with a nitrogen-containing plasma to form a lateral nitrided portion in the inner spacer and a nitrogen-introduced outer portion in the gate spacer; and
performing a removing process on the inner spacer and the gate spacer, such that the nitrogen-introduced outer portion of the gate spacer is removed, while the lateral nitrided portion of the inner spacer is partially retained.
9 . The method of claim 8 , wherein, before treating the inner spacer and the gate spacer, a density of the gate spacer is greater than a density of the inner spacer.
10 . The method of claim 9 , wherein, before treating the inner spacer and the gate spacer, a difference between the density of the gate spacer and the density of inner spacer is higher than 0.2 g/cm 3 .
11 . The method of claim 8 , wherein a first thickness of the lateral nitrided portion of the inner spacer is greater than a second thickness of the nitrogen-introduced outer portion of the gate spacer.
12 . The method of claim 11 , wherein a ratio of the first thickness to the second thickness ranges from 1.2 to 10.
13 . The method of claim 8 , wherein, after the removing process, a nitrogen content of the lateral nitrided portion of the inner spacer is greater than a nitrogen content of a remaining portion of the gate spacer.
14 . The method of claim 8 , after the removing process, further comprising:
growing a source/drain feature from the channel feature and the lateral nitrided portion of the inner spacer such that the source/drain feature fills the source/drain recess.
15 . A method for manufacturing a semiconductor structure, comprising:
forming a stack portion on a base portion, the stack portion including a channel feature and a sacrificial feature which is disposed beneath the channel feature;
forming a dummy gate portion on the stack portion;
forming a gate spacer on the stack portion and at a side of the dummy gate portion;
patterning the stack portion to form a source/drain recess, thereby exposing the base portion;
replacing an end portion of the sacrificial feature with an inner spacer through the source/drain recess;
forming a dielectric isolation layer on the base portion, the dielectric isolation layer being located at a bottom of the source/drain recess;
performing a treating process on the inner spacer, the gate spacer and the dielectric isolation layer using a nitrogen-containing plasma to form a lateral nitrided portion in the inner spacer, a nitrogen-introduced outer portion in the gate spacer, and an upper nitrided portion in the dielectric isolation layer; and
performing a removing process on the inner spacer, the gate spacer and the dielectric isolation layer, such that the nitrogen-introduced outer portion of the gate spacer is removed, while the lateral nitrided portion of the inner spacer and the upper nitrided portion of the dielectric isolation layer are partially retained.
16 . The method of claim 15 , wherein, after the treating process, the dielectric isolation layer has the upper nitrided portion and an isolation body which is disposed between the upper nitrided portion and the base portion, a nitrogen content of the upper nitrided portion being greater than a nitrogen content of the isolation body.
17 . The method of claim 15 , after the removing process, further comprising:
growing a source/drain feature from the channel feature, the lateral nitrided portion of the inner spacer, and the upper nitrided portion of the dielectric isolation layer such that the source/drain feature fills the source/drain recess.
18 . The method of claim 15 , wherein the dielectric isolation layer interfaces the inner spacer.
19 . The method of claim 15 , wherein a first thickness of the lateral nitrided portion of the inner spacer is greater than a second thickness of the upper nitrided portion of the dielectric isolation layer.
20 . The method of claim 15 , wherein, after the removing process, a nitrogen content of the upper nitrided portion of the dielectric isolation layer is greater than a nitrogen content of a remaining portion of the gate spacer.