Methods related to radio-frequency switching devices having improved voltage handling capability
Methods related to radio-frequency (RF) switching devices having improved voltage handling capability. In some embodiments, a method for fabricating an RF switching device can include: providing a semiconductor substrate; forming a plurality of field-effect transistors (FETs) on the semiconductor substrate such that the FETs have a non-uniform distribution of a parameter; and connecting the FETs to form a stack, such that the non-uniform distribution results in the stack having a first voltage handling capacity that is greater than a second voltage handling capacity corresponding to a similar stack having a substantially uniform distribution of the parameter.
1 . A method for implementing a radio-frequency switching device, the method comprising:
determining an electrical parameter of a first plurality of field-effect transistors for forming a first stack, the first plurality of field-effect transistors having a uniform distribution of a physical parameter of the first plurality of field-effect transistors across the first stack, the electrical parameter of the first plurality of field-effect transistors having a non-uniform distribution across the first stack corresponding to the uniform distribution of the physical parameter across the first stack;
determining a non-uniform distribution of the physical parameter for a second plurality of field-effect transistors for forming a second stack, the non-uniform distribution of the physical parameter of the second stack based on the non-uniform distribution of the electrical parameter of the first plurality of field-effect transistors across the first stack;
providing a semiconductor substrate;
forming the second plurality of field-effect transistors on the semiconductor substrate such that the second plurality of field-effect transistors has the non-uniform distribution of the physical parameter; and
connecting the second plurality of field-effect transistors to form the second stack such that the non-uniform distribution of the physical parameter across the second stack results in the second stack having a second voltage handling capacity that is greater than a first voltage handling capacity corresponding to the first stack having the uniform distribution of the physical parameter of the first plurality of field-effect transistors across the first stack.
2 . The method of claim 1 wherein the second stack further has a second ON-resistance (Ron) value that is less than a first Ron value corresponding to the first stack having the uniform distribution of the physical parameter.
3 . The method of claim 1 wherein the second stack further has a second linearity performance that is better than a first linearity performance corresponding to the first stack having the uniform distribution of the physical parameter.
4 . The method of claim 1 wherein each of the second plurality of field-effect transistors has a source, a drain, and a gate formed on an active region.
5 . The method of claim 4 wherein a field-effect transistor is implemented as a silicon-on-insulator (SOI) device.
6 . The method of claim 4 wherein the physical parameter includes a gate length.
7 . The method of claim 6 wherein a field-effect transistor is implemented as a finger configuration device such that the gate includes a number of rectangular shaped gate fingers, each gate finger implemented between a rectangular shaped source finger of a source contact and a rectangular shaped drain finger of a drain contact.
8 . The method of claim 6 wherein the non-uniform distribution of the gate length is based on a non-uniform distribution of an electrical parameter associated with the first plurality of field-effect transistors.
9 . The method of claim 8 wherein the electrical parameter includes a distribution of voltage VDS across each field-effect transistor.
10 . The method of claim 9 wherein the non-uniform distribution of the gate length tracks a scaled version of the voltage VDS distribution.
11 . The method of claim 10 wherein the scaled version of the voltage VDS distribution is based on scaling of a highest value of a voltage VDS distribution corresponding to the uniform distribution of the gate length.
12 . The method of claim 11 wherein the highest value of the voltage VDS is for a first field-effect transistor from a first terminal of the second stack.
13 . The method of claim 12 wherein the first terminal is configured as an input terminal for receiving a radio-frequency signal.
14 . The method of claim 12 wherein the gate length of at least the first field-effect transistor is greater than a value of the uniform distribution of the gate length.
15 . The method of claim 14 wherein at least some of the second plurality of field-effect transistors have gate lengths that are less than the value of the uniform distribution of the gate length.
16 . The method of claim 12 wherein a sum of VDS values of the second plurality of field-effect transistors for the non-uniform distribution of the gate length is greater than a sum of VDS values of the first plurality of field-effect transistors for the uniform distribution of the gate length.
17 . The method of claim 16 wherein a sum of gate lengths of the second plurality of field-effect transistors for the non-uniform distribution of the gate length is greater than a sum of the gate length of the first plurality of field-effect transistors for the uniform distribution of the gate length.
18 . The method of claim 8 wherein the non-uniform distribution of the gate length includes a plurality of groups of gate length values, each group having a common value of the gate length.