Thin film transistor array substrate and manufacturing method thereof

1 . A manufacturing method of a thin film transistor array substrate, comprising:

sequentially forming a first metal layer, an insulating layer, and a semiconductor layer on a bottom plate, wherein the first metal layer has a first portion and a second portion, the insulating layer covers the bottom plate and the first metal layer, and the semiconductor layer is located on the insulating layer and overlaps the first portion of the first metal layer;

forming a second metal layer on the semiconductor layer and the insulating layer;

forming a transparent electrode layer on the second metal layer;

patterning the transparent electrode layer such that a first portion of the transparent electrode layer is disposed along a first portion of the second metal layer, and a second portion of the transparent electrode layer is disposed along a second portion of the second metal layer, wherein the second portion of the second metal layer overlaps the second portion of the first metal layer;

patterning the second metal layer; and

forming a passivation layer to cover the insulating layer, the second metal layer, and the transparent electrode layer; and

etching the passivation layer above the second portion of the second metal layer to form an opening, wherein the second portion of the transparent electrode layer is an etch stop layer.

2 . The manufacturing method of the thin film transistor array substrate of claim 1 , wherein patterning the transparent electrode layer comprises:

forming a photoresist layer on the transparent electrode layer; and

etching, by the photoresist layer, the transparent electrode layer.

3 . The manufacturing method of the thin film transistor array substrate of claim 2 , wherein patterning the second metal layer comprises:

etching, by the photoresist layer, the second metal layer, such that the first portion and the second portion of the second metal layer are separated from each other, the first portion of the second metal layer has two sections separated from each other, and each of the two sections extends from a top surface of the semiconductor layer to a top surface of the insulating layer along a sidewall of the semiconductor layer.

4 . The manufacturing method of the thin film transistor array substrate of claim 3 , further comprising:

after etching the second metal layer by the photoresist layer, removing the photoresist layer.

5 . The manufacturing method of the thin film transistor array substrate of claim 4 , further comprising:

after removing the photoresist layer, increasing a temperature to crystalize the transparent electrode layer.

6 . The manufacturing method of the thin film transistor array substrate of claim 2 , further comprising:

after etching the transparent electrode layer by the photoresist layer, removing the photoresist layer.

7 . The manufacturing method of the thin film transistor array substrate of claim 6 , further comprising:

after removing the photoresist layer, increasing a temperature to crystalize the transparent electrode layer.

8 . The manufacturing method of the thin film transistor array substrate of claim 7 , wherein patterning the second metal layer comprises:

etching, by the crystalized transparent electrode layer, the second metal layer, such that the first portion and the second portion of the second metal layer are separated from each other, the first portion of the second metal layer has two sections separated from each other, and each of the two sections extends from a top surface of the semiconductor layer to a top surface of the insulating layer along a sidewall of the semiconductor layer.

9 . The manufacturing method of the thin film transistor array substrate of claim 7 , further comprising:

forming an overcoat layer to cover the passivation layer, wherein the overcoat layer has an opening, and the transparent electrode layer on the second portion of the second metal layer is located in the opening of the overcoat layer and the opening of the passivation layer.