Monolithic focal plane array circuit and method thereof
A monolithic focal plane array (FPA) device and method of fabrication. The method can include forming monolithic photodetectors or FPAs by heteroepitaxial growth of III-V PINs, APDs, or other photodetector devices in etched recesses of a Si-based read-out integrated circuit (ROIC) wafer. In a single-color device example, a wavelength configuring buffer layer and photodetector are grown within the etched recesses using compound semiconductor materials to enable infrared detection at desired wavelength(s). Depending on the application, this growth can be done on a graded compliant buffer layer and/or a selectively transparent buffer layer. And, semiconductor detectors can be incorporated to detect visible and NIR wavelengths in a dual-color device example. Further, the resulting devices can be configured as pixels in a sensor array device coupled to the ROIC device.
1 . A method of fabricating a monolithic sensor device, the method comprising:
providing a partially completed semiconductor read-out integrated circuit (ROIC) substrate comprising a silicon substrate, an ROIC device formed within a recessed portion of the silicon substrate, and a first dielectric layer formed overlying the ROIC device and the silicon substrate;
forming a first cavity region within a portion of the first dielectric layer exposing a second portion of the silicon substrate;
forming a buffer material overlying the second portion of the silicon substrate within the cavity region, wherein forming the buffer material comprises a selective area heteroepitaxy process;
forming a plurality of photodetector device materials overlying the buffer material within the cavity region to form a photodetector device overlying the second portion of the silicon substrate, wherein forming the photodetector device comprises a selective area heteroepitaxy process;
forming a second dielectric layer overlying the photodetector device and the first dielectric layer;
forming a second cavity region within a portion of the first and second dielectric layers exposing the ROIC device;
subjecting the ROIC device to one or more IC processing steps;
forming a first dielectric material within the second cavity region overlying the ROIC device;
forming a first metal interconnect within a portion of the second dielectric layer overlying and coupled to the photodetector device;
forming a second metal interconnect within a portion of the first dielectric material overlying and coupled to the ROIC device;
forming a third metal interconnect within a portion of the first dielectric material overlying and coupled to the ROIC device;
forming a first bond pad overlying the second dielectric layer and the first dielectric material, the first bond pad being coupled to the first and second metal interconnects; and
forming a second bond pad overlying the first dielectric material, the second bond pad being coupled to the third metal interconnect.
2 . The method of claim 1 wherein forming the photodetector device includes forming a topside illumination photodetector device configured for about 900 to 2500 nm wavelength applications.
3 . The method of claim 1 further comprising
flipping the sensor device onto an interposer substrate; and
removing or thinning the silicon substrate to a desired thickness;
wherein forming the photodetector device includes forming a backside illumination photodetector device configured to about 1000 to 2500 nm wavelength applications.
4 . The method of claim 1 wherein the ROIC substrate comprises an array configuration having a plurality of pixel regions; and wherein the sensor device is formed within each of the pixel regions resulting in a sensor array device.
5 . The method of claim 1 wherein forming the photodetector device comprises forming a III-V pixel infrared (IR) detector device.
6 . The method of claim 1 wherein forming the buffer material comprises forming a wavelength configuring material having a graded region configured for a selected wavelength, the graded region comprising a plurality of material regions configured in order of concentration with respect to at least a first element concentration including In z Ga 1-z As, In z Ga 1-z P, or In z Al 1-z As; and wherein the plurality of material regions includes an interface region between each adjacent pair of the material regions.
7 . The method of claim 1 wherein forming the buffer material comprises forming a wavelength configuring material having a selectively transparent region, the selectively transparent region comprising a plurality of material regions having at least a first material composition and a second material composition, the first material composition comprising an InGaP material, an InP strained layer superlattice (SLS) material, or an InGaP SLS material; and the second material composition comprising an InP spacer material; and wherein the plurality of material regions includes an interface region between each adjacent pair of the material regions.
8 . The method of claim 1 wherein forming the photodetector device comprises
forming an n-type contact region overlying the buffer material;
forming a UID absorber region overlying the n-type contact region;
forming a band transition region overlying the UID absorber region;
forming a non-absorbing p-type spacer region overlying the band transition region; and
forming a p-type contact region overlying the non-absorbing p-type spacer region.