Solid-state imaging device, manufacturing method of solid-state imaging device, and electronic apparatus
An object is to provide a solid-state imaging device, a manufacturing method of a solid-state imaging device, and an electronic apparatus that are capable of reducing tensile stress produced between a covering film and a semiconductor element which is joined to a solid-state imaging element and which is covered with the covering film, and that allow transistors to be provided near chip ends. There is provided a configuration including a solid-state imaging element, a semiconductor element laminated on the solid-state imaging element and electrically connected to the solid-state imaging element, and a covering film that covers a non-lamination portion that is a region where the semiconductor element is not laminated, in a laminated surface of the solid-state imaging element where the semiconductor element is laminated, and further covers a peripheral side surface of the semiconductor element and forms a clearance between the peripheral side surface of the semiconductor element and the covering film. This configuration can reduce tensile stress produced at chip ends of the semiconductor element when a covering film such as an oxide film is formed on the non-lamination portion of the solid-state imaging element and on an entire surface including the peripheral side surface of the semiconductor element on a side opposite to a lamination surface.
1 . A solid-state imaging device, comprising:
a solid-state imaging element;
a semiconductor element laminated on the solid-state imaging element and electrically connected to the solid-state imaging element; and
a covering film that covers a non-lamination portion that is a region where the semiconductor element is not laminated, in a laminated surface of the solid-state imaging element where the semiconductor element is laminated, and further covers a peripheral side surface of the semiconductor element and forms a clearance between the peripheral side surface of the semiconductor element and the covering film.
2 . The solid-state imaging device according to claim 1 , further comprising:
a protection film on the non-lamination portion of the solid-state imaging element and on an entire surface including the peripheral side surface of the semiconductor element on a side opposite to a lamination surface.
3 . The solid-state imaging device according to claim 1 , further comprising:
a protection film on the non-lamination portion of the solid-state imaging element.
4 . The solid-state imaging device according to claim 1 , further comprising:
a protection film on the non-lamination portion of the solid-state imaging element and on the peripheral side surface of the semiconductor element.
5 . The solid-state imaging device according to claim 1 , wherein electric connection between the solid-state imaging element and the semiconductor element includes Cu—Cu connection.
6 . The solid-state imaging device according to claim 1 , wherein a support substrate is joined via the covering film to a non-light receiving side of the laminated solid-state imaging element and the semiconductor element.
7 . The solid-state imaging device according to claim 6 , wherein joining between the covering film and the support substrate includes semiconductor direct joining.
8 . The solid-state imaging device according to claim 1 , wherein the clearance formed in the covering film makes contact with a support substrate.
9 . The solid-state imaging device according to claim 1 , wherein the clearance formed in the covering film includes a thin oxide film between an upper end of the clearance and a lower surface of a wiring layer of the solid-state imaging element.
10 . The solid-state imaging device according to claim 1 , wherein the clearance formed in the covering film has a substantially rectangular cross section.
11 . The solid-state imaging device according to claim 1 , wherein the clearance formed in the covering film has a substantially V-shaped cross section.
12 . The solid-state imaging device according to claim 1 , wherein a thin film of the covering film is formed between the clearance and the protection film.
13 . The solid-state imaging device according to claim 1 , wherein the clearance formed in the covering film has an aspect ratio of 1/50 or higher.
14 . The solid-state imaging device according to claim 1 , wherein the clearance formed in the covering film is filled with a film formable at a low temperature or a film having a low Young's modulus.
15 . The solid-state imaging device according to claim 14 , wherein the film formable at the low temperature includes an organic film.
16 . The solid-state imaging device according to claim 14 , wherein the film having the low Young's modulus includes a film that contains at least one of silicon dioxide (SiO 2 ), silicon nitride (Si 3 N 4 ), silicon carbide (SiC), copper (Cu), aluminum (Al), or carbon (C) each of which is porous and used as a low-k material, or includes an organic film.
17 . The solid-state imaging device according to claim 1 , wherein two or more semiconductor elements are provided on a lower surface of the solid-state imaging element in a horizontal direction.
18 . The solid-state imaging device according to claim 17 , wherein the two or more semiconductor elements provided in the horizontal direction has the clearance between the semiconductor elements.
19 . The solid-state imaging device according to claim 1 , wherein two or more semiconductor elements are laminated in a vertical direction on a lower surface of the solid-state imaging element.
20 . The solid-state imaging device according to claim 19 , wherein the clearance is formed on an entire peripheral side surface of the two or more semiconductor elements laminated in the vertical direction.
21 . The solid-state imaging device according to claim 1 , wherein the covering film includes an inorganic oxide film or an organic film.
22 . The solid-state imaging device according to claim 1 , wherein a heat dissipation member having predetermined heat conductivity is laminated on a non-light receiving side of the semiconductor element via the covering film.
23 . The solid-state imaging device according to claim 22 , wherein the heat dissipation member contains at least one of silicon carbide (SIC), aluminum nitride (AlN), silicon nitride (Si 3 N 4 ), copper (Cu), aluminum (Al), or carbon (C).
24 . A manufacturing method of a solid-state imaging device, the manufacturing method comprising:
joining a wiring layer of a solid-state imaging element and a wiring layer of a semiconductor element and electrically connecting the wiring layer of the solid-state imaging element and the wiring layer of a semiconductor element;
thinning a silicon layer of the semiconductor element;
forming a protection film on a non-lamination portion that is a region where the semiconductor element is not laminated, in a laminated surface of the solid-state imaging element where the semiconductor element is laminated, and on a surface including a peripheral side surface of the semiconductor element on a side opposite to a lamination surface;
covering the protection film with a covering film and flattening the covering film;
removing the covering film on the peripheral side surface of the semiconductor element to form a clearance;
covering an opening of the clearance with the covering film and flattening the covering film;
joining a support substrate to the covering film; and
carrying out packaging.
25 . The manufacturing method of the solid-state imaging device according to claim 24 ,
wherein the covering the opening of the clearance with the covering film and the flattening the covering film include
forming a temporary filling film within the clearance after formation of the clearance, and
removing the temporary filling film and flattening the covering film after the opening of the clearance is covered with the covering film.
26 . An electronic apparatus comprising:
a solid-state imaging device that includes
a solid-state imaging element,
a semiconductor element laminated on the solid-state imaging element and electrically connected to the solid-state imaging element, and
a covering film that covers a non-lamination portion that is a region where the semiconductor element is not laminated, in a laminated surface of the solid-state imaging element where the semiconductor element is laminated, and further covers a peripheral side surface of the semiconductor element and forms a clearance between the peripheral side surface of the semiconductor element and the covering film.