IP Library Granted Patent US 12666833
Granted Patent B2
US 12666833 · App. 17/483,504 · Granted Jun 23, 2026

Display backplane, method for manufacturing the same and display device

Inventors: Liangchen Yan (Beijing, CN); Jun Geng (Beijing, CN); Tongshang Su (Beijing, CN); Wei He (Beijing, CN); Bin Zhou (Beijing, CN)
Assignees: Hefei Xinsheng Optoelectronics Technology Co., Ltd.; BOE Technology Group Co., Ltd.
H10K59/176G02F1/136227H10K59/1201
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Quick Facts
Patent No.
US 12666833
App. No.
17/483,504
Granted
Jun 23, 2026
Kind
B2
Abstract

A display backplane, a manufacturing method thereof, and a display device are provided. The display backplane includes a base substrate. A thin film transistor array layer, a protective layer, a planarization layer, and a light-emitting element are arranged on the base substrate. A first through hole is formed in the protective layer, and a second through hole is formed in the planarization layer. The first through hole and the second through hole are connected. A source electrode or a drain electrode is electrically connected to an anode via the first through hole and the second through hole. Each of the first through hole and the second through hole has a sidewall inclined relative to the base substrate.

Claims (47)

1 . A display backplane, comprising a base substrate, wherein a thin film transistor array layer, a protective layer, a planarization layer and a light-emitting element are laminated one on another in sequence on the base substrate; wherein the protective layer is configured to cover a source electrode or a drain electrode of the thin film transistor array layer;

wherein a first through hole is formed in the protective layer, and the first through hole is used to expose the source electrode or the drain electrode; a second through hole is formed in the planarization layer, and the first through hole and the second through hole are connected;

wherein the source electrode or the drain electrode of the thin film transistor array layer is electrically connected to an anode of the light-emitting element via the first through hole and the second through hole;

wherein each of the first through hole and the second through hole comprises a sidewall that is inclined with respect to the base substrate;

wherein a thickness of the planarization layer is at least 2 μm;

wherein the planarization layer has two opposite sidewalls along a cross-section that are inclined with respect to the base substrate, one of two opposite sidewalls of the planarization layer has a step-like structure at the second through hole, and the other of the two opposite sidewalls of the planarization layer does not have a step-like structure at the second through hole;

the step-like structure of the planarization layer comprises a first sidewall, a second sidewall and a connecting member connecting the first sidewall and the second sidewall, and materials of the first sidewall, the second sidewall and the connecting member are the same; the first sidewall and a third sidewall of the first through hole that is inclined with respect to the base substrate are coplanar, and the other of the two opposite sidewalls of the planarization layer is not coplanar with another sidewall opposite to the third sidewall of the first through hole;

the planarization layer comprises a first plane and a second plane that are parallel to a third plane where base substrate is located, the first plane and the second plane are opposite to each other, the first plane is adjacent to the protective layer, the second plane is adjacent to the light-emitting element, and one of a height from the first plane to the connecting member and a height from the connecting member to the second plane is greater than a thickness of the protective layer.

2 . The display backplane according to claim 1 , wherein an orthographic projection of the first through hole onto the base substrate is a first orthographic projection, an orthographic projection of the second through hole onto the base substrate is a second orthographic projection, the second orthographic projection covers the first orthographic projection, an area of the second orthographic projection is larger than an area of the first orthographic projection, and a contour line of the second orthographic projection partially overlaps a contour line of the first orthographic projection.

3 . The display backplane according to claim 1 , wherein an area of a cross-section of the first through hole near the base substrate is smaller than an area of a cross-section of the first through hole near the planarization layer.

4 . The display backplane according to claim 3 , wherein areas of cross-sections of the first through hole gradually decrease in a direction approaching the base substrate.

5 . The display backplane according to claim 1 , wherein an acute angle, between the sidewall of the first through hole that is inclined with respect to the base substrate and a plane where the base substrate is located, ranges from 40° to 60°.

6 . The display backplane according to claim 2 , further comprising a data line connected with the source electrode or the drain electrode;

wherein each of the contour lines of the first orthographic projection and the second orthographic projection is a polygon, and a part where the contour lines of the first orthographic projection and the second orthographic projection are overlapped is an edge of the polygon;

wherein an extension direction of the part where the contour lines are overlapped is the same as an extension direction of the data line, or, an extension direction of the part where the contour lines are overlapped is perpendicular to an extension direction of the data line.

7 . A method for manufacturing the display backplane according to claim 1 , comprising:

forming the thin film transistor array layer on a surface of the base substrate;

forming an inorganic material layer on a surface of the thin film transistor array layer away from the base substrate;

forming the planarization layer with the second through hole, on a surface of the inorganic material layer away from the thin film transistor array layer;

performing a first patterning process on the inorganic material layer at the second through hole to form the first through hole, and obtaining the protective layer; and

forming the light-emitting element on surfaces of the planarization layer and the thin film transistor array layer away from the base substrate, to obtain the display backplane;

wherein the forming the planarization layer with the second through hole on the surface of the inorganic material layer away from the thin film transistor array layer comprises:

forming a first photoresist layer on the surface of the inorganic material layer away from the thin film transistor array layer; and

performing a second patterning process on the first photoresist layer by using a first mask, to obtain the planarization layer with the second through hole;

wherein the performing the first patterning process on the inorganic material layer at the second through hole to form the first through hole comprises:

forming a second photoresist layer on the surface of the planarization layer away from the thin film transistor array layer, wherein the second photoresist layer covers the planarization layer and the second through hole is filled with the second photoresist layer;

performing a third patterning process on the second photoresist layer by using a second mask, to form a third through hole in the second photoresist layer and expose a part of a surface of the planarization layer; and

etching the inorganic material layer to form the first through hole so as to obtain the protective layer;

wherein the method further comprises: etching the exposed planarization layer to form the step- like structure at the second through hole of the planarization layer.

8 . The method according to claim 7 , wherein a part of an orthographic projection of a second opening in the second mask onto the base substrate is outside an orthographic projection of a first opening in the first mask onto the base substrate;

wherein a distance, from an edge of the orthographic projection of the second opening onto the base substrate, to an edge of the orthographic projection of the first opening onto the base substrate, ranges from 1.5 μm to 2.0 μm, wherein the edge of the orthographic projection of the second opening is outside the orthographic projection of the first opening.

9 . The method according to claim 7 , wherein a process for etching the inorganic material layer comprises dry etching.

10 . A display device, comprising a display backplane, wherein the display backplane comprises a base substrate, a thin film transistor array layer, a protective layer, a planarization layer, and a light-emitting element are laminated one on another in sequence on the base substrate; wherein the protective layer is configured to cover a source electrode or a drain electrode of the thin film transistor array layer;

wherein a first through hole is formed in the protective layer, and the first through hole is used to expose the source electrode or the drain electrode; a second through hole is formed in the planarization layer, and the first through hole and the second through hole are connected;

wherein the source electrode or the drain electrode of the thin film transistor array layer is electrically connected to an anode of the light-emitting element via the first through hole and the second through hole;

wherein each of the first through hole and the second through hole comprises a sidewall that is inclined with respect to the base substrate;

wherein a thickness of the planarization layer is at least 2 μm;

wherein the planarization layer has two opposite sidewalls along a cross-section that are inclined with respect to the base substrate, one of two opposite sidewalls of the planarization layer has a step-like structure at the second through hole, and the other of the two opposite sidewalls of the planarization layer does not have a step-like structure at the second through hole;

the step-like structure of the planarization layer comprises a first sidewall, a second sidewall and a connecting member connecting the first sidewall and the second sidewall, and materials of the first sidewall, the second sidewall and the connecting member are the same; the first sidewall and a third sidewall of the first through hole that is inclined with respect to the base substrate are coplanar, and the other of the two opposite sidewalls of the planarization layer is not coplanar with another sidewall opposite to the third sidewall of the first through hole;

the planarization layer comprises a first plane and a second plane that are parallel to a third plane where base substrate is located, the first plane and the second plane are opposite to each other, the first plane is adjacent to the protective layer, the second plane is adjacent to the light-emitting element, and one of a height from the first plane to the connecting member and a height from the connecting member to the second plane is greater than a thickness of the protective layer.

11 . The display device according to claim 10 , wherein an orthographic projection of the first through hole onto the base substrate is a first orthographic projection, an orthographic projection of the second through hole onto the base substrate is a second orthographic projection, the second orthographic projection covers the first orthographic projection, an area of the second orthographic projection is larger than an area of the first orthographic projection, and a contour line of the second orthographic projection partially overlaps a contour line of the first orthographic projection.

12 . The display device according to claim 10 , wherein areas of cross-sections of the first through hole gradually decrease in a direction approaching the base substrate.

13 . The display device according to claim 10 , wherein an acute angle, between the sidewall of the first through hole that is inclined with respect to the base substrate and a plane where the base substrate is located, ranges from 40° to 60°.

14 . The display device according to claim 11 , wherein the display backplane further comprises a data line connected with the source electrode or the drain electrode;

wherein each of the contour lines of the first orthographic projection and the second orthographic projection is a polygon, and a part where the contour lines of the first orthographic projection and the second orthographic projection are overlapped is an edge of the polygon;

wherein an extension direction of the part where the contour lines are overlapped is the same as an extension direction of the data line, or, an extension direction of the part where the contour lines are overlapped is perpendicular to an extension direction of the data line.

15 . The display backplane according to claim 1 , wherein an acute angle, between the one of two opposite sidewalls of the planarization layer that has a step-like structure at the second through hole and the third plane, ranges from 40° to 60°.