Tension generation device and semiconductor manufacturing device
According to an aspect of the present disclosure, a tension generation device includes a plurality of electrode pairs each including a first electrode and a second electrode and a voltage application circuitry that is configured such that each of the plurality of electrode pairs is arranged so as to interpose an end portion of a wafer by the first electrode and the second electrode in a direction perpendicular to a principal surface of the wafer, and a voltage is applied between the first electrode and the second electrode of each of the plurality of electrode pairs in a state where the first electrode and the second electrode protrude to an outer side than the wafer when seen in the direction perpendicular to the principal surface of the wafer.
1 . A tension generation device comprising:
a plurality of electrode pairs each including a first electrode and a second electrode; and
a voltage application circuitry that is configured such that each of the plurality of electrode pairs is arranged so as to interpose an end portion of a wafer by the first electrode and the second electrode in a direction perpendicular to a principal surface of the wafer, and a voltage is applied between the first electrode and the second electrode of each of the plurality of electrode pairs in a state where the first electrode and the second electrode protrude to an outer side than the wafer when seen in the direction perpendicular to the principal surface of the wafer.
2 . The tension generation device according to claim 1 , wherein a tension is exercised on the wafer by applying the voltage between the first electrode and the second electrode.
3 . The tension generation device according to claim 1 , wherein the first electrode and the second electrode are configured to apply the voltage in the direction perpendicular to the principal surface of the wafer.
4 . The tension generation device according to claim 1 , wherein at least one of the first electrode and the second electrode is spaced apart from the wafer.
5 . The tension generation device according to claim 1 , wherein, in a state where the voltage is applied, an interval between the first electrode and the second electrode is 40 μm or greater to 200 μm or smaller.
6 . The tension generation device according to claim 1 ,
wherein an insulation layer is provided to a surface of at least one of the first electrode and the second electrode, the surface being opposed to the wafer, and
the insulation layer has a Young's modulus lower than 130 GPa.
7 . The tension generation device according to claim 1 , wherein the voltage application circuitry is configured to be capable of applying voltages of different magnitudes to the plurality of electrode pairs.
8 . The tension generation device according to claim 1 , wherein the voltage application circuitry is configured to be capable of applying voltages to the plurality of electrode pairs at different timings.
9 . The tension generation device according to claim 1 , wherein the wafer is made with a wide band gap semiconductor.
10 . The tension generation device according to claim 9 , wherein the wide band gap semiconductor is silicon carbide, gallium-nitride-based material or diamond.
11 . A semiconductor manufacturing device comprising:
the tension generation device according to claim 1 ;
a chuck stage; and
a movement mechanism that is configured to arrange, on the chuck stage, the wafer on which tension is exercised by the tension generation device.