Method of forming semiconductor device

1 . A method of forming a semiconductor device, comprising:

forming a wafer having an ion-implanted silicon layer, wherein the ion-implanted silicon layer is disposed between a first insulator layer and a second insulator layer inside the wafer;

forming an active region over the ion-implanted silicon layer;

forming an active device in the active region; and

forming a conductive via to couple the ion-implanted silicon layer and the active device.

2 . The method of claim 1 , wherein the forming of the active device in the active region comprises:

forming a semiconductor fin structure in the active region; and

forming a gate electrode on a first portion of the semiconductor fin structure.

3 . The method of claim 2 , wherein the forming of the conductive via to couple the ion-implanted silicon layer and the active device comprises:

etching a portion of the first insulator layer;

forming the conductive via over a portion of the ion-implanted silicon layer; and

forming a contact layer over a second portion of the semiconductor fin structure to couple the conductive via.

4 . The method of claim 1 , wherein the forming of the conductive via to couple the ion-implanted silicon layer and the active device comprises:

etching the active region to expose a portion of the first insulator layer;

etching a portion of the first insulator layer; and

forming the conductive via over a portion of the ion-implanted silicon layer.

5 . The method of claim 4 , wherein the forming of the active device in the active region comprises:

forming a semiconductor fin base over the portion of the first insulator layer and the conductive via;

forming a semiconductor fin structure on the semiconductor fin base; and

forming a gate electrode and a contact layer on the semiconductor fin structure.

6 . The method of claim 1 , wherein the active device, the ion-implanted silicon layer, the first insulator layer, and the second insulator layer are arranged to extend to a first boundary from a second boundary of the semiconductor device, and the method further comprises:

etching the active device, the ion-implanted silicon layer, the first insulator layer, and the second insulator layer on at least one of the first boundary and the second boundary; and

forming a polysilicon layer for coupling an edge of the active device, an edge of the ion-implanted silicon layer, an edge of the first insulator layer, and an edge of the second insulator layer.

7 . A method of forming a semiconductor device, comprising:

forming a wafer having a buried conductive layer, wherein the buried conductive layer is disposed between a first insulator layer and a second insulator layer inside the wafer;

defining an active region over the buried conductive layer;

forming a trench in the active region, wherein the first insulator layer is exposed through a bottom of the trench;

forming a conductive via coupled to the buried conductive layer; and

forming an active device in the active region.

8 . The method of claim 7 , wherein the forming of the conductive via to couple the conductive layer comprises:

etching a portion of the first insulator layer to expose a portion of the buried conductive layer; and

forming the conductive via over the portion of the buried conductive layer.

9 . The method of claim 7 , further comprising forming an isolation fin adjacent to the active region.

10 . The method of claim 7 , wherein the conductive via is formed in the first insulator layer exposed through the bottom of the trench.

11 . The method of claim 7 , wherein the active device is formed in the trench.

12 . The method of claim 7 , further comprising forming a spacer over sidewalls of the trench.

13 . A method of forming a semiconductor device, comprising:

receiving a substrate comprising a first insulator layer, a second insulator layer, a conductive layer between the first insulator layer and the second insulator layer, and a first semiconductor layer disposed over the first insulator layer;

removing portions of the first insulator layer, portions of the second insulator layer and portions of the conductive layer to form an active region;

forming an isolation fin adjacent to the active region; and

forming a conductive via penetrating the first insulator layer and coupled to the conductive layer.

14 . The method of claim 13 , further comprising:

removing portions of the first semiconductor layer to expose the first insulator layer; and

forming a spacer over sidewalls of a remaining portion of the first semiconductor layer,

wherein the remaining portion of the first semiconductor layer and the spacer form a mask structure, and the removing of the portions of the first insulator layer, the portions of the second insulator layer and the portions of the conductive layer is performed through the mask structure.

15 . The method of claim 13 , further comprising forming at least a fin structure in the active region.

16 . The method of claim 15 , further comprising performing a planarization on the fin structure and the active region.

17 . The method of claim 15 , further comprising form a second semiconductor layer in the active region, wherein the second semiconductor layer is coupled to the fin structure.

18 . The method of claim 15 , further comprising forming an epitaxial layer in the active region, wherein the epitaxial layer is coupled to the conductive via and the fin structure.

19 . The method of claim 18 , further comprising forming a contact layer over the epitaxial layer.

20 . The method of claim 17 , wherein the second semiconductor layer is coupled to the conductive layer.