Method for manufacturing semiconductor device and semiconductor device
A method for manufacturing a semiconductor device includes following operations. A substrate is provided, including memory array region. A plurality of bit lines are formed in memory array region. First insulating material is filled between the plurality of bit lines. A plurality of trenches intersecting with bit lines are provided in first insulating material. Memory array region includes inner region and boundary region outside same. Second insulating material is filled in trenches to form spacing lines. Second insulating material is also deposited above bit lines, spacing lines and first insulating material to form cap material layer. Etching process is performed to form node contact holes, including following operations. Cap material layer is etched to form cap layer covering bit lines, spacing lines and first insulating material in boundary region. First insulating material in inner region is removed by etching with cap layer as mask to from node contact holes.
1 . A semiconductor device, comprising:
a substrate, wherein the substrate comprises a memory array region and a peripheral region, wherein the memory array region comprises an inner region and a boundary region located outside the inner region, the peripheral region adjacent to the boundary region of the memory array region;
a plurality of bit lines located in the memory array region;
a plurality of spacing lines located in the memory array region and intersecting with the plurality of bit lines to form a plurality of hole structures, wherein the hole structures located in the inner region are node contact holes;
a first insulating material filled in the hole structures in the boundary region; and
a cap layer covering the bit lines, the spacing lines, and the first insulating material in the boundary region; wherein the cap layer further covers the peripheral region, and the top surface of the cap layer in the peripheral region is higher than the top surface of the cap layer in the boundary region.
2 . The semiconductor device of claim 1 , wherein the first insulating material comprises silicon oxide, and a material of the cap layer comprises silicon nitride.
3 . The semiconductor device of claim 1 , wherein a thickness of the cap layer ranges between 6-10 nm.
4 . The semiconductor device of claim 1 , further comprising: a plurality of word lines embedded in the substrate and located below the spacing lines.
5 . The semiconductor device of claim 1 , wherein a material of the spacing lines is same as a material of the cap layer.
6 . The semiconductor device of claim 1 , further comprising: a conductive material disposed in the node contact holes to form node contact plugs.