IP Library Granted Patent US 12666974
Granted Patent B2
US 12666974 · App. 18/142,357 · Granted Jun 23, 2026

Silver sintered molybdenum (SSM) packaging for power semiconductor devices

Inventors: Yuhang Yang (Hamilton, CA); Ali Emadi (Burlington, CA)
Assignee: McMaster University
H10W70/417H10W40/258H10W70/04H10W72/07331H10W72/07631H10W72/352H10W72/886H10W72/952H10W90/736H10W90/766
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Quick Facts
Patent No.
US 12666974
App. No.
18/142,357
Granted
Jun 23, 2026
Kind
B2
Abstract

The present disclosure generally relates to a silver sintered molybdenum (SSM) packaging for power semiconductor devices and a method of manufacturing thereof. The SSM packaging comprises a substrate; a MOSFET die comprising a first side and a second side, wherein the first side is bonded to the substrate using nano silver sintering; and at least two leads connected, at a respective first end, to the substrate and, at a respective second end, to the second side of the MOSFET die, wherein nano silver sintering is used to bond the first and second ends of the at least two leads, and wherein each of the substrate and at least two leads is formed of pure molybdenum.

Claims (10)

1 . A packaging module comprising:

a substrate;

a MOSFET die comprising a first side and a second side, wherein the first side is bonded to the substrate using nano silver sintering; and

at least two leads connected, at a respective first end, to the substrate and, at a respective second end, to the second side of the MOSFET die, wherein nano silver sintering is used to bond the first and second ends of the at least two leads, and

wherein each of the substrate and the at least two leads is formed of pure molybdenum.

2 . The packaging module of claim 1 , wherein the MOSFET die comprises a silicon carbide (SiC) die.

3 . The packaging module of claim 1 , further comprising a heat sink stacked below the substrate, and the heat sink is also formed of pure molybdenum.

4 . The packaging module of claim 3 , further comprising an insulator layer stacked between the heat sink and the substrate.

5 . The packaging module of claim 4 , wherein the insulator layer is formed of bismaleimide triazine resin.

6 . The packaging of claim 1 , wherein the substrate includes a first substrate side and a second substrate side, and the first substrate side is coated with ruthenium (Ru)/silver (Ag).