IP Library Granted Patent US 12666985
Granted Patent B2
US 12666985 · App. 18/360,208 · Granted Jun 23, 2026

Semiconductor device with hybrid routing and method therefor

Inventors: Chee Seng Foong (Austin, TX); Trent Uehling (New Braunfels, TX); Tingdong Zhou (Austin, TX); Kristen LeAnne Mason (Austin, TX)
Assignee: NXP USA, Inc.
H10W70/65H10W70/05H10W74/012H10W74/131H10W74/15H10W72/072H10W72/07236H10W72/073H10W72/252H10W90/724H10W90/734
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Quick Facts
Patent No.
US 12666985
App. No.
18/360,208
Granted
Jun 23, 2026
Kind
B2
Abstract

A semiconductor device having hybrid routing is provided. The semiconductor device includes a package substrate having a first major side and a second major side. A plurality of conductive bond-on-pad (BOP) pads and a plurality of conductive bond-on-trace (BOT) pads are formed at the first major side. A non-conductive layer is formed over the plurality of BOP pads. Openings in the non-conductive layer expose a central portion of each BOP pad of the plurality of BOP pads. An inlet region is formed in the non-conductive layer such that a first BOT pad of the plurality of BOT pads is located within the inlet region.

Claims (24)

1 . A method comprising:

forming a plurality of conductive bond-on-pad (BOP) pads at a first major side of a package substrate;

forming a plurality of conductive bond-on-trace (BOT) pads at the first major side of the package substrate;

depositing a non-conductive layer over the plurality of BOP pads;

forming openings in the non-conductive layer such that a central portion of each BOP pad of the plurality of BOP pads is exposed; and

forming an inlet region in the non-conductive layer such that a first BOT pad of the plurality of BOT pads is located within the inlet region.

2 . The method of claim 1 , wherein the first BOT pad is located between a first BOP pad of the plurality of BOP pads and a second BOP pad of the plurality of BOP pads.

3 . The method of claim 1 , wherein the first BOT pad located within the inlet region is substantially flanked on two sides by the non-conductive layer.

4 . The method of claim 1 , wherein the first BOT pad located within the inlet region is directly connected to a first BOP pad of the plurality of BOP pads by way of a conductive trace formed at the first major side of the package substrate.

5 . The method of claim 1 , further comprising:

affixing a semiconductor die on the first major side of the package substrate; and

connecting bond pads of the semiconductor die to the plurality of BOP pads and plurality of BOT pads by way of conductive die connectors.

6 . The method of claim 5 , further comprising injecting an underfill material between the semiconductor die and the first major side of the package substrate.

7 . A method comprising:

forming a plurality of conductive bond-on-pad (BOP) pads at a first major side of a package substrate;

forming a plurality of conductive bond-on-trace (BOT) pads at the first major side of the package substrate;

depositing a non-conductive layer over the plurality of BOP pads;

forming openings in the non-conductive layer such that a central portion of each BOP pad of the plurality of BOP pads is exposed;

forming an inlet region in the non-conductive layer such that a first BOT pad of the plurality of BOT pads is located within the inlet region; and

affixing a semiconductor die on the first major side of the package substrate, the semiconductor die overlaying the plurality of BOP pads and the plurality of BOT pads.

8 . The method of claim 7 , wherein the first BOT pad is located between a first BOP pad of the plurality of BOP pads and a second BOP pad of the plurality of BOP pads.

9 . The method of claim 8 , wherein forming the inlet region in the non-conductive layer further includes a second BOT pad of the plurality of BOT pads located within the inlet region between the first BOP pad of the plurality of BOP pads and a third BOP pad of the plurality of BOP pads.

10 . The method of claim 7 , wherein the first BOT pad located within the inlet region is substantially flanked on three sides by the non-conductive layer.

11 . The method of claim 7 , further comprising forming a plurality of connector pads at a second major side of the package substrate, a first connector pad of the plurality of connector pads interconnected with the first BOT pad by way of the package substrate.