Semiconductor structure and method for forming the same
View Patent ↗A semiconductor structure is provided, and includes a substrate and a plurality of devices disposed over the substrate. The semiconductor structure includes an interconnect structure disposed over the substrate and electronically connected to the devices. The semiconductor structure also includes a bonding film formed over the interconnect structure. The semiconductor structure further includes a protective layer formed on sidewalls of the substrate, the interconnect structure and the bonding film. In addition, the semiconductor structure includes a dielectric material formed on a sidewall of the protective layer and overlapping with the protective layer in a top view.
1 . A semiconductor structure, comprising:
a substrate;
a plurality of devices disposed over the substrate;
an interconnect structure disposed over the substrate and electronically connected to the devices;
a bonding film formed over the interconnect structure;
a protective layer formed on sidewalls of the substrate, the interconnect structure and the bonding film, wherein a width of the protective layer gradually increases away from the substrate on the sidewalls of the bonding film along a vertical direction; and
a dielectric material formed on a sidewall of the protective layer and overlapping with the protective layer in a top view.
2 . The semiconductor structure as claimed in claim 1 , wherein the protective layer has a first width parallel to a first surface of the bonding film, the protective layer has a second width parallel to a second surface of the substrate, the first surface is parallel to the second surface, and the first width is greater than the second width.
3 . The semiconductor structure as claimed in claim 2 , wherein a difference between the first width and the second width is from 0.1% to 10%.
4 . The semiconductor structure as claimed in claim 1 , wherein the width of the protective layer is from 10Å to 1000 Å.
5 . The semiconductor structure as claimed in claim 1 , wherein the protective layer continuously extends from the sidewall of the substrate to the sidewall of the bonding film.
6 . The semiconductor structure as claimed in claim 1 , wherein a top surface of the protective layer is spaced apart from a bottom surface of the protective layer in the top view.
7 . The semiconductor structure as claimed in claim 1 , further comprising a conductive pad formed in the bonding film and electronically connected to the interconnect structure, wherein the conductive pad is spaced apart from the protective layer.
8 . A semiconductor package, comprising:
a package substrate;
a plurality of first semiconductor dies disposed over the package substrate, wherein the first semiconductor dies are spaced apart from each other;
at least one bonding film formed on the first semiconductor dies and bonded to the package substrate;
a protective layer formed on sidewalls of each of the first semiconductor dies and a sidewall of the at least one bonding film, wherein the width of the protective layer gradually decreases away from the package substrate along the sidewall of the at least one bonding film; and
a dielectric material formed between adjacent two of the first semiconductor dies and sandwiched by the protective layer, wherein a width of the dielectric material between the adjacent two of the first semiconductor dies gradually increases towards the package substrate along a vertical direction.
9 . The semiconductor package as claimed in claim 8 , wherein the protective layer is in contact with each of the first semiconductor dies and the dielectric material.
10 . The semiconductor package as claimed in claim 8 , wherein the protective layer has a curved profile.
11 . The semiconductor package as claimed in claim 8 , further comprising a second semiconductor die disposed over and electrically connected to one of the first semiconductor dies.
12 . The semiconductor package as claimed in claim 8 , wherein the at least one bonding film comprises a first bonding film formed on a front surface of the package substrate, and the protective layer ends at a front surface of the first bonding film.
13 . The semiconductor package as claimed in claim 12 , wherein the at least one bonding film comprises a second bonding film bonded to the first bonding film, and the protective layer is formed on a sidewall of the second bonding film.
14 . The semiconductor package as claimed in claim 8 , wherein a spacing between the adjacent two of the first semiconductor dies is not less than 15 μm.
15 . A semiconductor structure, comprising:
an interconnect structure disposed over a substrate, wherein the interconnect structure comprises metallization patterns in a plurality of dielectric layers and a plurality of etch stop layers alternatively stacked with the dielectric layers;
a protective layer formed on a sidewall of the interconnect structure, wherein the sidewall of the interconnect structure is inclined relative to a normal direction of the substrate, and a width of the protective layer gradually decreases towards the substrate along the sidewall of the interconnect structure; and
a bonding film formed over the interconnect structure, wherein the width of the protective layer gradually increases away from the substrate along a sidewall of the bonding film.
16 . The semiconductor structure as claimed in claim 15 , further comprising a dielectric material formed on a sidewall of the protective layer.
17 . The semiconductor structure as claimed in claim 16 , wherein when viewed in the normal direction of the substrate, the dielectric material overlaps with the protective layer.
18 . The semiconductor structure as claimed in claim 15 , wherein the protective layer is formed on the sidewall of the bonding film.
19 . The semiconductor structure as claimed in claim 15 , wherein the width of the protective layer is from 10Å to 1000 Å.
20 . The semiconductor structure as claimed in claim 8 , wherein a top surface of the protective layer is offset from a bottom surface of the protective layer in the top view.