Package device including capacitor disposed on opposite side of die relative to substrate
A package device is provided. The package device includes a substrate, a plurality of upper lands disposed on one surface of the substrate, a plurality of upper solder balls disposed on the plurality of upper lands, a die connected to the plurality of upper solder balls, a plurality of lower lands disposed on the other surface of the substrate, a plurality of lower solder balls disposed on some of the plurality of lower lands, and a capacitor connected to the lower lands on which the plurality of lower solder balls are not disposed among the plurality of lower lands, provided on an opposite side of the die, and including a height greater than the height of the plurality of lower solder balls.
1 . A package device comprising:
a substrate;
a plurality of upper lands disposed on one surface of the substrate;
a plurality of upper solder balls disposed on the plurality of upper lands;
a die connected to the plurality of upper solder balls;
a plurality of lower lands disposed on another surface of the substrate;
a plurality of lower solder balls disposed on some of the plurality of lower lands;
a capacitor connected to the lower lands on which the plurality of lower solder balls are not disposed among the plurality of lower lands, provided on an opposite side of the die, and comprising a height greater than the height of the plurality of lower solder balls;
a motherboard facing the other surface of the substrate; and
at least one antenna connected to the motherboard,
wherein the capacitor is spaced apart from the motherboard.
2 . The package device of claim 1 , wherein the capacitor is disposed at a position overlapping the die based on a height direction of the substrate.
3 . The package device of claim 1 , wherein based on a normal direction of the other surface of the substrate, a maximum distance of the capacitor from the other surface of the substrate is greater than a maximum distance of the plurality of lower solder balls from the other surface of the substrate.
4 . The package device of claim 1 ,
wherein the plurality of upper lands comprises a power upper land and a ground upper land, and
wherein the plurality of lower lands comprises:
a power lower land electrically connected to the power upper land and physically connected to one side of the capacitor, and
a ground lower land electrically connected to the ground upper land and physically connected to another side of the capacitor.
5 . The package device of claim 4 , wherein the power lower land and the ground lower land are provided on the opposite side of the die relative to the substrate.
6 . The package device of claim 5 , wherein the power lower land and the ground lower land are disposed at a position overlapping the die based on a height direction of the substrate.
7 . The package device of claim 1 , further comprising:
an interposer comprising an accommodating part accommodating at least a portion of the capacitor, disposed on the opposite side of the die relative to the substrate, disposed between the substrate and the motherboard, and connected to the plurality of lower solder balls; and
a plurality of interposer solder balls connecting the interposer to the motherboard.
8 . The package device of claim 1 , further comprising:
a plurality of board lands disposed on a surface of the motherboard facing the other surface of the substrate,
wherein at least two lower solder balls are disposed side by side between one of the plurality of lower lands and one board land facing the one of the plurality of lower lands.
9 . The package device of claim 8 , wherein a distance between the one of the plurality of lower lands and the one board land is greater than a height of the capacitor.
10 . The package device of claim 1 , further comprising:
a plurality of board lands disposed on a surface of the motherboard facing the other surface of the substrate; and
a connecting pin connected to the plurality of lower solder balls and disposed between one of the plurality of lower lands and one board land facing the one of the plurality of lower lands.
11 . The package device of claim 10 , wherein a sum of a height of the plurality of lower solder balls and a height of the connecting pin is greater than a height of the capacitor.
12 . The package device of claim 1 ,
wherein the substrate comprises a substrate groove recessed in the other surface of the substrate, and
wherein at least a portion of the capacitor is accommodated in the substrate groove.
13 . A package device comprising:
a motherboard;
at least one antenna connected to the motherboard;
a substrate comprising a bottom surface facing the motherboard and a top surface that is an opposite surface of the bottom surface;
a plurality of upper lands disposed on the top surface of the substrate;
a plurality of upper solder balls disposed on the plurality of upper lands;
a die connected to the plurality of upper solder balls;
a plurality of lower lands disposed on the bottom surface of the substrate;
a plurality of lower solder balls disposed on some of the plurality of lower lands;
a capacitor connected to the lower lands on which the plurality of lower solder balls are not disposed among the plurality of lower lands, provided on an opposite side of the die, and comprising a height greater than the height of the plurality of lower solder balls;
an interposer disposed between the substrate and the motherboard and connected to the plurality of lower solder balls; and
a plurality of interposer solder balls connecting the interposer to the motherboard,
wherein the capacitor is disposed at a position overlapping the die based on a height direction of the substrate.
14 . The package device of claim 13 , further comprising:
a plurality of board lands disposed on a surface of the motherboard facing the other surface of the substrate,
wherein at least two lower solder balls are disposed side by side between one of the plurality of lower lands and one board land facing the one of the plurality of lower lands.
15 . A package device comprising:
a motherboard;
at least one antenna connected to the motherboard;
a substrate comprising a bottom surface facing the motherboard and a top surface that is an opposite surface of the bottom surface;
a plurality of upper lands disposed on the top surface of the substrate;
a plurality of upper solder balls disposed on the plurality of upper lands;
a die connected to the plurality of upper solder balls;
a plurality of lower lands disposed on the bottom surface of the substrate;
a plurality of lower solder balls disposed on some of the plurality of lower lands;
a capacitor connected to the lower lands on which the plurality of lower solder balls are not disposed among the plurality of lower lands, provided on an opposite side of the die, and comprising a height greater than the height of the plurality of lower solder balls;
a plurality of board lands disposed on a surface of the motherboard facing the other surface of the substrate; and
a connecting pin disposed between a lower solder ball disposed on one of the plurality of lower lands and a board land facing the one of the plurality of lower lands,
wherein the capacitor is disposed at a position overlapping the die based on a height direction of the substrate.