IP Library Granted Patent US 12668484
Granted Patent B2
US 12668484 · App. 17/376,580 · Granted Jun 30, 2026

Microelectromechanical systems device having improved signal distortion

Inventor: Ting-Jung Chen (Kaohsiung City, TW)
Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
B81B3/0021B81C1/00158B81B2201/0257B81B2201/032B81B2203/0127B81B2203/0145B81B2203/0163B81B2203/019B81B2203/0315
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Quick Facts
Patent No.
US 12668484
App. No.
17/376,580
Granted
Jun 30, 2026
Kind
B2
Abstract

Various embodiments of the present disclosure are directed towards a semiconductor device. The semiconductor device comprises a substrate. A cavity is disposed in the substrate. A microelectromechanical system (MEMS) layer is disposed over the substrate. The MEMS layer comprises a movable diaphragm disposed over the cavity. The movable diaphragm comprises a central region and a peripheral region. The movable diaphragm is flat in the central region of the movable diaphragm. The movable diaphragm is corrugated in the peripheral region of the movable diaphragm.

Claims (58)

1 . A semiconductor device, comprising:

a substrate having first and second inner sidewalls that define outer edges of a cavity when viewed in a cross-section of the semiconductor device;

a movable diaphragm suspended over the cavity when viewed in the cross-section, the movable diaphragm including a central region and first and second peripheral regions that couple the central region to the respective first and second inner sidewalls of the substrate,

wherein the first and second peripheral regions each include an upper surface with multiple grooves and multiple ridges when viewed in the cross-section,

wherein the central region has a uniform thickness defined between a flat upper surface of the central region and a flat lower surface of the central region when viewed in cross section, and wherein outermost edges of the central region have the uniform thickness, and wherein a lowermost point of a groove in the upper surface of the peripheral region is arranged on a plane that is parallel to an upper surface of the substrate and that traverses the central region between the flat upper surface and the flat lower surface.

2 . The semiconductor device of claim 1 , wherein the multiple ridges each include a flat upper surface and a flat lower surface, the flat upper surface of each ridge being level with the flat upper surface of the central region, and the flat lower surface of each ridge being level with the flat lower surface of the central region when viewed in the cross-section.

3 . The semiconductor device of claim 1 , wherein the multiple grooves each include a flat upper surface and a flat lower surface, the flat upper surface of each groove being disposed at a height that is between the flat upper surface of the central region and the flat lower surface of the central region, and the flat lower surface of each groove being at a height that is lower than the flat lower surface of the central region when viewed in the cross-section.

4 . A semiconductor device, comprising:

a substrate;

a cavity disposed in the substrate;

a microelectromechanical system (MEMS) layer disposed over the substrate, wherein:

the MEMS layer comprises a movable diaphragm disposed over the cavity;

the movable diaphragm has a flat portion and a corrugated portion; and

the corrugated portion of the movable diaphragm laterally surrounds the flat portion of the movable diaphragm and comprises grooves and ridges that have upwardly facing surfaces and comprises inverted grooves and inverted ridges that have downwardly facing surfaces, wherein peaks of the ridges are flat surfaces that are co-planar with a top surface of the flat portion and the peaks of the inverted grooves are flat surfaces that are co-planar with a surface of the substrate.

5 . The semiconductor device of claim 4 , further comprising:

an actuation device disposed over the MEMS layer, wherein the actuation device is configured to displace the movable diaphragm in response to an electrical signal.

6 . The semiconductor device of claim 5 , wherein the actuation device comprises a piezoelectric structure disposed between an upper electrode and a lower electrode.

7 . The semiconductor device of claim 4 , wherein:

the corrugated portion of the movable diaphragm comprises alternating ridges and grooves; and

the grooves comprise angled sidewalls.

8 . The semiconductor device of claim 7 , wherein:

one of the ridges is spaced further from the flat portion than each of the other ridges; and

an outer sidewall of the movable diaphragm extends from an upper surface of the one of the ridges and is substantially vertical.

9 . The semiconductor device of claim 7 , wherein bottom surfaces of the grooves are substantially planar.

10 . The semiconductor device of claim 9 , wherein upper surfaces of the ridges are substantially planar.

11 . The semiconductor device of claim 10 , wherein the bottom surfaces of the grooves are disposed between an upper surface of the flat portion of the movable diaphragm and a bottom surface of the flat portion of the movable diaphragm.

12 . A semiconductor device, comprising:

a substrate;

a cavity disposed in the substrate;

a microelectromechanical system (MEMS) layer disposed over the substrate, wherein:

the MEMS layer comprises a movable diaphragm disposed over the cavity;

the movable diaphragm comprises a central region and a peripheral region;

the movable diaphragm has a flat surface in the central region of the movable diaphragm;

the movable diaphragm is corrugated in the peripheral region of the movable diaphragm;

wherein the peripheral region has a top side and a bottom side that each comprise multiple grooves and multiple ridges, wherein the grooves and the ridges each comprise a flat surface that is parallel to the flat surface of the movable diaphragm;

an actuation device disposed over the MEMS layer, wherein:

the actuation device is configured to displace the movable diaphragm in response to an electrical signal; and

wherein the peripheral region has a thickness defined between a bottommost point of a groove on its upper surface and a bottommost point of an inverted ridge on its lower surface, wherein the flat lower surface of the central region lies on a plane that is substantially parallel to an upper surface of the substrate that traverses the thickness of the peripheral region between those two bottommost points.

13 . The semiconductor device of claim 12 , wherein:

the actuation device comprises a piezoelectric structure disposed between an upper electrode and a lower electrode; and further comprising:

a passivation layer disposed over the actuation device and the movable diaphragm, wherein the passivation layer lines the MEMS layer in both the central region of the movable diaphragm and the peripheral region of the movable diaphragm.

14 . The semiconductor device of claim 12 , wherein:

the peripheral region of the movable diaphragm comprises a first portion of the peripheral region and a second portion of the peripheral region; and

the first portion of the peripheral region and the second portion of the peripheral region are disposed on opposite sides of the central region of the movable diaphragm.

15 . The semiconductor device of claim 14 , wherein:

the first portion of the peripheral region, the second portion of the peripheral region, and the central region of the movable diaphragm extend continuously between first opposite sidewalls of the movable diaphragm; and

the central region of the movable diaphragm laterally separates the first portion of the peripheral region from the second portion of the peripheral region.

16 . The semiconductor device of claim 15 , wherein:

the movable diaphragm has second opposite sidewalls;

the second opposite sidewalls of the movable diaphragm are spaced apart in a first direction;

the first opposite sidewalls of the movable diaphragm are spaced apart in a second direction that is perpendicular to the first direction;

the first portion of the peripheral region extends laterally from the central region to one of the second opposite sidewalls of the movable diaphragm; and

the second portion of the peripheral region extends laterally from the central region to another one of the second opposite sidewalls of the movable diaphragm.

17 . The semiconductor device of claim 12 , wherein the peripheral region of the movable diaphragm extends laterally around the central region of the movable diaphragm in a closed loop path.

18 . The semiconductor device of claim 17 , wherein the peripheral region of the movable diaphragm is a continuous region that extends laterally from the central region to outer sidewalls of the movable diaphragm.

19 . The semiconductor device of claim 18 , wherein:

the one or more grooves and the one or more ridges alternate from the central region of the movable diaphragm to the outer sidewalls of the movable diaphragm.

20 . The semiconductor device of claim 19 , wherein the one or more grooves and the one or more ridges are concentric.