IP Library Granted Patent US 12669321
Granted Patent B2
US 12669321 · App. 18/485,762 · Granted Jun 30, 2026

Device and method for determining wafer bow

Inventors: Daniel Fulford (Albany, NY); Mark I. Gardner (Austin, TX); Henry Jim Fulford (Marianna, FL); Anton Devilliers (Albany, NY)
Assignee: Tokyo Electron Limited
G01B7/28
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Quick Facts
Patent No.
US 12669321
App. No.
18/485,762
Granted
Jun 30, 2026
Kind
B2
Abstract

An apparatus for measuring bow of a wafer, includes a substrate holder having a support surface configured to support a wafer; and a capacitor array unit including a plurality of electrodes laterally spaced from one another in the capacitor array unit. Each electrode faces the support surface and is spaced a respective fixed distance from the support surface such that each electrode can form a capacitor with an opposing area of a substrate provided on the support surface of the substrate holder.

Claims (30)

1 . An apparatus for measuring bow of a wafer, comprising:

a substrate holder having a support surface configured to support a wafer; and

a capacitor array unit comprising a plurality of electrodes laterally spaced from one another in the capacitor array unit, each electrode facing the support surface and being spaced a respective fixed distance from the support surface such that each electrode forms a capacitor with an opposing area of a substrate provided on the support surface of the substrate holder.

2 . The apparatus of claim 1 , further comprising a movement device configured to move at least one of the substrate holder and the capacitor array unit relative to each other.

3 . The apparatus of claim 1 , wherein the plurality of electrodes are provided in a common plane such that the respective fixed distances of each electrode are equal.

4 . The apparatus of claim 1 , wherein the capacitor array unit comprises:

an insulating structure having a first surface facing the support surface and a second surface opposite to the first surface, the insulating structure supporting the plurality of electrodes; and

a plurality of signal lines supported by the insulating structure, each signal line being connected to a respective one of the plurality of electrodes.

5 . The apparatus of claim 4 , wherein each of the electrodes comprises a capacitor plate provided on the first surface of the insulating structure.

6 . The apparatus of claim 4 , wherein each of the electrodes comprises a capacitor plate which is at least partially embedded within the insulating structure.

7 . The apparatus of claim 4 , wherein each of the signal lines is at least partially embedded within the insulating structure.

8 . The apparatus of claim 4 , further comprising a cable coupled to the capacitor array unit and configured to bundle the plurality of signal lines as an input-output cable for the capacitor array unit.

9 . The apparatus of claim 1 , further comprising a controller electrically connected to each electrode and configured to be electrically connected to a wafer supported by the wafer support surface.

10 . The apparatus of claim 9 , wherein the controller comprises:

a voltage source configured to provide a voltage to each electrode; and

a capacitance measurement device configured to measure a capacitance on each electrode based on a respective voltage provided thereto.

11 . The apparatus of claim 10 , further comprising a processing unit including a processor and a memory for storing software which, when executed by the processor, calculates a distance from each electrode to an opposing area of a wafer provided on the substrate holder based on a capacitance measured on each respective electrode.

12 . The apparatus of claim 11 , wherein the memory stores software which, when executed by the processor, provides a wafer bow mapping based on the distance from each electrode to the opposing area of a wafer provided on the substrate holder.

13 . The apparatus of claim 11 , wherein the memory stores software which, when executed by the processor, provides a 3D wafer bow mapping based on the distance from each electrode to the opposing area of a wafer provided on the substrate holder.

14 . The apparatus of claim 10 , further comprising a connecting element configured to electrically connect the capacitance measurement device to a wafer provided on the supporting surface of the substrate holder.

15 . The apparatus of claim 14 , wherein the connecting element comprises at least one of the substrate holder in contact with a backside surface of the substrate holder and a contact probe configured to contact a top surface of the wafer.

16 . A method of measuring wafer bow comprising:

providing a plurality of electrodes each facing a respective area of a wafer surface such that the electrode and respective area form a capacitor;

measuring a capacitance value at each electrode;

calculating a distance from each electrode to its respective area based on the measured capacitance at the respective electrode; and

determining a bow of the wafer based on the calculated distances.

17 . The method of claim 16 , wherein the providing comprises providing multiple electrodes provided in a grid array.

18 . The method of claim 16 , further comprising providing a 3D model of the wafer bow based on the calculated distances.

19 . The method of claim 16 , further comprising controlling a process performed on the wafer based on the determined bow of the wafer.

20 . The method of claim 16 , further comprising performing a bow correction process on the wafer based on the determined bow of the wafer.