Monolithic humidity sensor devices and methods of manufacture
Monolithic humidity sensor devices, and methods of manufacture. The devices include circuitry on or over a silicon substrate. A primary passivation barrier is formed over the circuitry with conductive vias therethrough; a capacitor, comprising metal fingers with spaces therebetween, is formed above said primary passivation barrier and electrically coupled by the conductive vias to the circuitry. A secondary passivation barrier is formed over the capacitor. A hygroscopic material layer is formed over the secondary passivation barrier, wherein the capacitor is operable to exhibit a capacitance value responsive to moisture present in the hygroscopic material layer and the circuitry is operable to generate a signal responsive to said capacitance value.
1 . An integrated circuit, comprising:
circuitry on or over a semiconductor substrate, the circuitry including top-level metal interconnects;
a passivation overcoat (PO) layer over the top-level metal interconnects;
conductive vias through the PO layer connected to the top-level metal interconnects;
a humidity sensing element over the PO layer, including a first terminal connected to a first conductive via and a second terminal connected to a second conductive via; and,
a hygroscopic material layer between the first and second terminals.
2 . The integrated circuit recited in claim 1 , wherein the humidity sensing element includes spaced-apart metal lines.
3 . The integrated circuit recited in claim 2 , further comprising a dielectric moisture barrier layer on the metal lines.
4 . The integrated circuit recited in claim 3 , wherein the dielectric moisture barrier layer comprises silicon oxynitride.
5 . The integrated circuit recited in claim 3 , wherein the dielectric moisture barrier layer extends into recesses in the PO layer between the metal lines.
6 . The integrated circuit recited in claim 1 , further comprising a metal shield at least partially surrounding the humidity sensing element.
7 . The integrated circuit recited in claim 6 , wherein the metal shield is formed from a same metal layer as bond pads over the PO layer.
8 . The integrated circuit recited in claim 1 , wherein the conductive vias comprise tungsten.
9 . The integrated circuit recited in claim 1 , wherein the hygroscopic material layer includes a polyimide.
10 . An integrated circuit, comprising:
a circuitry layer over a semiconductor substrate, the circuitry layer including metal interconnects;
a passivation layer over the circuitry layer;
a moisture sensing element over the passivation layer, the moisture sensing element including first and second electrodes; and
one or more vertical interconnections that connect at least one of the first and second electrodes to the circuitry layer through the passivation layer.
11 . The integrated circuit of claim 10 , wherein the moisture sensing element includes a plurality of spaced-apart metal lines.
12 . The integrated circuit of claim 11 , further comprising a hygroscopic material between the metal lines.
13 . The integrated circuit of claim 12 , wherein the hygroscopic material includes a polyimide.
14 . The integrated circuit of claim 11 , wherein the metal lines are configured as a capacitor.
15 . The integrated circuit of claim 11 , further comprising a dielectric moisture barrier over the plurality of metal lines.
16 . The integrated circuit of claim 15 , wherein the dielectric moisture barrier includes a silicon oxide layer on the metal lines, and a silicon nitride layer on the silicon oxide layer.