Device for generating IQ signals and method for manufacturing a device for generating IQ signal
A device for generating IQ signals. An input port receives a differential input signal via a first and a second terminal of the input port. A first output port outputs a differential I output signal. A first terminal is electrically connected to the first terminal of the first output port via a first connecting line and a second terminal is electrically connected to the second terminal of the first output port via a second connecting line. A second output port outputs a differential Q output signal via a first and a second terminal of the second output port. The first terminal of the second output port is electrically connected to a first terminal of an isolated port via a third connecting line, and the second terminal of the second output port is electrically connected to a second terminal of the isolated port via a fourth connecting line.
1 . A device for generating IQ signals, comprising:
an input port configured to receive a differential input signal via a first and a second terminal of the input port;
a first output port configured to output a differential I output signal via a first and a second terminal of the first output port, wherein the first terminal of the input port is electrically connected to the first terminal of the first output port via a first connecting line, and wherein the second terminal of the input port is electrically connected to the second terminal of the first output port via a second connecting line;
a second output port configured to output a differential Q output signal via a first and a second terminal of the second output port;
an isolated port having two terminals, wherein the first terminal of the second output port is electrically connected to a first terminal of the isolated port via a third connecting line, and the second terminal of the second output port is electrically connected to a second terminal of the isolated port via a fourth connecting line;
wherein the first and second connecting lines are formed in at least a first plane of a substrate of the device, and wherein the third and fourth connecting lines are formed offset to the first and second connecting lines in at least a second plane of the substrate; and
wherein the first, second, third, and fourth connecting lines are arranged symmetrically with respect to a first axis and asymmetrically with respect to a second axis in a top view, wherein the first axis and the second axis are orthogonal to one another in a substrate plane of the substrate.
2 . The device according to claim 1 , further comprising:
at most three passive circuit elements, including an electrical resistor connected between the first terminal and the second terminal of the isolated port.
3 . The device according to claim 2 , wherein: (i) the at most three passive circuit elements include a first capacitor that is connected between the first terminal of the first output port and the first terminal of the isolated port, and/or (ii) the at most three passive circuit elements include a second capacitor that is connected between the second terminal of the input port and the second terminal of the second output port.
4 . The device according to claim 3 , wherein a capacitance of the first capacitor and/or a capacitance of the second capacitor is capable of being adjusted.
5 . The device according to claim 4 , wherein the first capacitor and/or the second capacitor is: (i) a controllable varactor or (ii) a capacitor that can be switched on and off digitally.
6 . The device according to claim 1 , wherein each of the first, second, third, and fourth connecting lines has at least one and a half windings.
7 . A method for manufacturing a device for generating IQ signals, comprising the following steps:
forming an input port that is configured to receive a differential input signal via a first and a second terminal of the input port;
forming a first output port that is configured to output a differential I output signal via a first and a second terminal of the first output port, wherein the first terminal of the input port is electrically connected to the first terminal of the first output port via a first connecting line, and the second terminal of the input port is electrically connected to the second terminal of the first output port via a second connecting line;
forming a second output port that is configured to output a differential Q output signal via a first and a second terminal of the second output port; and
forming an isolated port having two terminals, wherein the first terminal of the second output port is electrically connected to a first terminal of the isolated port via a third connecting line, and the second terminal of the second output port is electrically connected to a second terminal of the isolated port via a fourth connecting line;
wherein the first and second connecting lines are formed in at least a first plane of a substrate of the device, and the third and fourth connecting lines are formed offset to the first and second connecting lines in at least a second plane of the substrate; and
wherein the first, second, third, and fourth connecting lines are arranged symmetrically with respect to a first axis and asymmetrically with respect to a second axis in a top view, wherein the first axis and the second axis are orthogonal to one another in a substrate plane of the substrate.
8 . The method according to claim 7 , wherein at most three passive circuit elements are formed, including an electrical resistor that is connected between the first terminal and the second terminal of the isolated port.
9 . The method according to claim 8 , wherein: (i) the at most three passive circuit elements include a first capacitor that is connected between the first terminal of the first output port and the first terminal of the isolated port, and/or (ii) the at most three passive circuit elements include a second capacitor that is connected between the second terminal of the input port and the second terminal of the second output port.
10 . The method according to claim 9 , wherein a capacitance of the first capacitor and/or a capacitance of the second capacitor is capable of being adjusted.