IP Library › Granted Patent US 12669936
Granted Patent B2
US 12669936 · App. 18/395,222 · Granted Jun 30, 2026

Folding operations for improved sequential read performance

Inventors: Nitul Gohain (Bangalore, IN); Nicola Colella (Capodrise, IT); Jameer Mulani (Bangalore, IN)
Assignee: Micron Technology, Inc.
G06F3/0613G06F3/064G06F3/0659G06F3/0679
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Quick Facts
Patent No.
US 12669936
App. No.
18/395,222
Granted
Jun 30, 2026
Kind
B2
Abstract

Methods, systems, and devices for folding operations for improved sequential read performance are described. A memory system may perform a single-die access operation to program data to source data blocks of the memory system. The memory system may reorder the data during folding to destination data blocks of the memory system such that a multi-die access operation may be performed to sequentially read the data from the destination data blocks. For example, data may be programmed to the source data blocks in a first order as part of a single-die access operation, and the data may be folded to the destination data blocks in a second order as part of a single-die access operation, where the supports sequentially reading the data from the destination data blocks as part of a multi-die access operation.

Claims (72)

1 . An apparatus, comprising:

one or more memory devices; and

a controller coupled with the one or more memory devices and configured to cause the apparatus to:

determine to transfer data from a set of source data blocks of the apparatus to a set of destination data blocks of the apparatus;

generate, based at least in part on determining to transfer the data, a first order for transferring respective portions of the data to the set of destination data blocks in accordance with a single-die access operation, the first order associated with a second order associated with a sequential read of the data from the set of destination data blocks in accordance with a multi-die access operation and different than a third order according to which the data was written to the set of source data blocks; and

transfer the data from the set of source data blocks to the set of destination data blocks based at least in part on the first order.

2 . The apparatus of claim 1 , wherein, to transfer the data, the controller is configured to cause the apparatus to:

sense the data from the set of source data blocks to a volatile memory device of the apparatus according to the first order; and

write the data from the volatile memory device to the set of destination data blocks according to the first order based at least in part on sensing the data to the volatile memory device according to the first order.

3 . The apparatus of claim 1 , wherein, to transfer the data, the controller is configured to cause the apparatus to:

transfer a first portion of the data from the set of source data blocks to a first destination data block of the set of destination data blocks; and

transfer, after transferring the first portion of the data, a second portion of the data from the set of source data blocks to a second destination data block of the set of destination data blocks.

4 . The apparatus of claim 1 , wherein, to generate the first order, the controller is configured to cause the apparatus to:

determine the third order based at least in part on a mapping between logical addresses of the data and physical addresses of the data within the set of source data blocks; and

modify the third order based at least in part on the second order to generate the first order.

5 . The apparatus of claim 1 , wherein the controller is further configured to cause the apparatus to:

sequentially read the data from the set of destination data blocks according to the second order based at least in part on the transferring the data according to the first order; and

transmit the sequentially read data to a host system coupled with the apparatus.

6 . The apparatus of claim 5 , wherein, to sequentially read the data, the controller is configured to cause the apparatus to:

transfer, via a first channel, a first portion of the data according to the second order to a volatile memory device of the apparatus for transmission to the host system;

transfer, after or concurrent with transferring the first portion of the data via a second channel, a second portion of the data according to the second order to the volatile memory device for transmission to the host system; and

transfer, after or concurrent with transferring the second portion of the data via the first channel, a third portion of the data according to the second order to the volatile memory device for transmission to the host system.

7 . The apparatus of claim 1 , wherein:

the set of source data blocks comprises a source virtual block associated with a set of memory dies of the apparatus; and

the set of destination data blocks comprises a destination virtual block associated with the set of memory dies of the apparatus.

8 . The apparatus of claim 7 , wherein, to transfer the data, the controller is configured to cause the apparatus to:

transfer a first portion of the data from portions of the set of memory dies associated with the source virtual block to a portion of a first memory die associated with the destination virtual block; and

transfer, after transferring the first portion of the data, a second portion of the data from portions of the set of memory dies associated with the source virtual block to a portion of a second memory die associated with the destination virtual block.

9 . The apparatus of claim 1 , wherein each source data block of the set of source data blocks and each destination data block of the set of destination data blocks is associated with one or more virtual blocks of a respective memory die of the apparatus.

10 . The apparatus of claim 1 , wherein:

the set of source data blocks comprise single-level cells, multi-level cells, tri-level cells, quad-level cells, or any combination thereof, and

the set of destination data blocks comprise quad-level cells.

11 . An apparatus, comprising:

one or more memory devices; and

a controller coupled with the one or more memory devices and configured to cause the apparatus to:

determine to transfer data from a set of source data blocks of the apparatus to a set of destination data blocks of the apparatus;

generate, based at least in part on determining to transfer the data, a fourth order for transferring respective portions of the data to the set of destination data blocks based at least in part on a third order according to which the data was written to the set of source data blocks;

generate a first order based at least in part on transposing the fourth order, the first order for transferring respective portions of the data to the set of destination data blocks, wherein the first order is associated with a second order associated with a sequential read of the data from the set of destination data blocks and different than the third order; and

transfer the data from the set of source data blocks to the set of destination data blocks based at least in part on the first order.

12 . A non-transitory computer-readable medium storing code comprising instructions which, when executed by a processor of an electronic device, cause the electronic device to:

determine to transfer data from a set of source data blocks of a memory system to a set of destination data blocks of the memory system;

generate, based at least in part on determining to transfer the data, a first order for transferring respective portions of the data to the set of destination data blocks, the first order associated with a second order associated with a sequential read of the data from the set of destination data blocks in accordance with a multi-die access operation and different than a third order according to which the data was written to the set of source data blocks in accordance with a single-die access operation; and

transfer the data from the set of source data blocks to the set of destination data blocks based at least in part on the first order.

13 . The non-transitory computer-readable medium of claim 12 , wherein the instructions to transfer the data, when executed by the processor of the electronic device, cause the electronic device to:

sense the data from the set of source data blocks to a volatile memory device of the memory system according to the first order; and

write the data from the volatile memory device to the set of destination data blocks according to the first order based at least in part on sensing the data to the volatile memory device according to the first order.

14 . The non-transitory computer-readable medium of claim 12 , wherein the instructions to generate the first order, when executed by the processor of the electronic device, cause the electronic device to:

determine the third order based at least in part on a mapping between logical addresses of the data and physical addresses of the data within the set of source data blocks; and

modify the third order based at least in part on the second order to generate the first order.

15 . The non-transitory computer-readable medium of claim 12 , wherein the instructions are further executable by the processor to:

sequentially read the data from the set of destination data blocks according to the second order based at least in part on the transferring the data according to the first order; and

transmit the sequentially read data to a host system coupled with the memory system.

16 . A non-transitory computer-readable medium storing code comprising instructions which, when executed by a processor of an electronic device, cause the electronic device to:

determine to transfer data from a set of source data blocks of a memory system to a set of destination data blocks of the memory system;

generate, based at least in part on determining to transfer the data, a fourth order for transferring respective portions of the data to the set of destination data blocks based at least in part on a third order according to which the data was written to the set of source data blocks;

generate a first order based at least in part on transposing the fourth order, the first order for transferring respective portions of the data to the set of destination data blocks, wherein the first order is associated with a second order associated with a sequential read of the data from the set of destination data blocks and different than the third order; and

transfer the data from the set of source data blocks to the set of destination data blocks based at least in part on the first order.

17 . A method, comprising:

determining to transfer data from a set of source data blocks of a memory system to a set of destination data blocks of the memory system;

generating, based at least in part on determining to transfer the data, a first order for transferring respective portions of the data to the set of destination data blocks, the first order associated with a second order associated with a sequential read of the data from the set of destination data blocks in accordance with a multi-die access operation and different than a third order according to which the data was written to the set of source data blocks in accordance with a single-die access operation; and

transferring the data from the set of source data blocks to the set of destination data blocks based at least in part on the first order.

18 . The method of claim 17 , wherein transferring the data comprises:

sensing the data from the set of source data blocks to a volatile memory device of the memory system according to the first order; and

writing the data from the volatile memory device to the set of destination data blocks according to the first order based at least in part on sensing the data to the volatile memory device according to the first order.

19 . The method of claim 17 , wherein generating the first order comprises:

determining the third order based at least in part on a mapping between logical addresses of the data and physical addresses of the data within the set of source data blocks; and

modifying the third order based at least in part on the second order to generate the first order.

20 . A method, comprising:

determining to transfer data from a set of source data blocks of a memory system to a set of destination data blocks of the memory system;

generating, based at least in part on determining to transfer the data, a fourth order for transferring respective portions of the data to the set of destination data blocks based at least in part on a third order according to which the data was written to the set of source data blocks;

generating a first order based at least in part on transposing the fourth order, the first order for transferring respective portions of the data to the set of destination data blocks, wherein the first order is associated with a second order associated with a sequential read of the data from the set of destination data blocks and different than the third order; and

transferring the data from the set of source data blocks to the set of destination data blocks based at least in part on the first order.