Low complexity bit-error-rate estimation for encoded foggy-fine programming

1 . A memory die to estimate a bit-error-rate (BER) for an encoded foggy program operation to determine whether to decode foggy programmed data on the memory die for a fine programming operation, the memory die comprises:

blocks to store data in various formats; and

a memory controller to receive data from a storage device, generate at least one parity page based on the data, perform a foggy program operation to write the data to memory cells in a block, separate states in a memory cell into categories based on a value of a parity page associated with a state, perform soft bit sensing operations, estimate a BER for the memory cell based on the soft bit sensing operations, based on the BER, perform on-die decoding of the foggy programmed data with the at least one parity page, and write decoded data to the block with a fine program operation.

2 . The memory die of claim 1 , wherein the memory controller uses one parity page to indicate whether a foggy programmed state was one of even and odd and assigns foggy programmed states with a same parity page value to a category.

3 . The memory die of claim 1 , wherein the memory controller uses two parity pages to split foggy programmed states into four categories and assigns foggy programmed states with a same parity page value to a category.

4 . The memory die of claim 1 , wherein the memory controller uses a value of the at least one parity page to distinguish between states in the categories and to enable large state separation between states in a category.

5 . The memory die of claim 1 , wherein the soft bit sensing operations includes reading around midpoints between states in a category and generating a soft bit page for the category.

6 . The memory die of claim 5 , wherein the memory controller estimates the BER by counting a number of zeros in the soft bit page, wherein if the number is below a threshold, the memory controller performs the on-die decoding of the foggy programmed data.

7 . The memory die of claim 5 , wherein the memory controller estimates the BER by counting a number of zeros in the soft bit page, wherein if the number is above a threshold, the memory controller sends the foggy programmed data to the storage device for decoding.

8 . The memory die of claim 1 , wherein the soft bit sensing operations includes performing sense operations around midpoints between states at different voltage levels, performing exclusive NORs on results of the sense operations to generate a soft bit page, and storing the results of the sense operations on a latch.

9 . The memory die of claim 1 , wherein the soft bit sensing operations includes performing sense operations around midpoints between states with a single control gate voltage and modulated integration times, performing exclusive NORs on results of the sense operations to generate a soft bit page, and storing the results of the sense operations on a latch.

10 . The memory die of claim 1 , wherein the memory controller performs a foggy page read and soft bit sensing within an operation.

11 . The memory die of claim 1 , wherein the memory controller estimates the BER of multiple categories within a single sense operation, uses the at least one parity bit to determine which sensing operations to exclusive NOR, stores the soft bit sensing operation associated with one category into a latch for states with a same parity bit value, and generates one soft bit page including cells in transition regions of the multiple categories.

12 . A method in a memory die for estimating a bit-error-rate (BER) for an encoded foggy program operation to determine whether to decode foggy programmed data on the memory die for a fine programming operation, the memory die comprises a controller to execute the method comprising:

receiving data from a storage device;

generating at least one parity page based on the data;

performing a foggy program operation to write the data to memory cells in a block;

separating states in a memory cell into categories based on a value of a parity page associated with a state;

performing soft bit sensing operations;

estimating a BER for the memory cell based on the soft bit sensing operations;

based on the BER, performing on-die decoding of the foggy programmed data with the at least one parity page; and

writing decoded data to the block with a fine program operation.

13 . The method of claim 12 , further comprising:

using one parity page to indicate whether a foggy programmed state was one of even and odd and assigning foggy programmed states with a same parity page value to a category; and

using two parity pages to split foggy programmed states into four categories and assigning foggy programmed states with the same parity page value to one of the four categories.

14 . The method of claim 12 , wherein performing soft bit sensing operations includes reading around midpoints between states in a category and generating a soft bit page for the category.

15 . The method of claim 14 , wherein estimating the BER comprises counting a number of zeros in the soft bit page, wherein if the number is below a threshold, performing the on-die decoding of the foggy programmed data and if the number is above the threshold, sending the foggy programmed data to the storage device for decoding.

16 . The method of claim 12 , wherein performing soft bit sensing operations comprises one of:

performing sense operations around midpoints between states at different voltage levels, performing exclusive NORs on results of the sense operations to generate a soft bit page, and storing the results of the sense operations on a latch; and

performing sense operations around the midpoints between states with a single control gate voltage and modulated integration times, performing exclusive NORs on results of the sense operations to generate the soft bit page, and storing the results of the sense operations on the latch.

17 . The method of claim 12 , further comprising performing a foggy page read and soft bit sensing within an operation.

18 . The method of claim 12 , further comprising estimating the BER of multiple categories within a single sense operation, using the at least one parity bit to determine which sensing operations to exclusive NOR, storing the soft bit sensing operation associated with one category into a latch for states with a same parity bit value, and generating one soft bit page including cells in transition regions of the multiple categories.

19 . A method in a memory die for estimating a bit-error-rate (BER) for an encoded foggy program operation to determine whether to decode foggy programmed data on the memory die for a fine programming operation, the memory die comprises a controller to execute the method comprising:

receiving data from a storage device;

generating at least one parity page based on the data;

performing a foggy program operation to write the data to memory cells in a block;

separating states in a memory cell into categories based on a value of a parity page associated with a state;

performing soft bit sensing operations and generating a soft bit page;

estimating a BER for the memory cell based on the soft bit page;

based on the BER, one of performing on-die decoding of the foggy programmed data with the at least one parity page and determining that the foggy programmed data is to be transferred to the storage device for decoding; and

when the foggy programmed data is to be transferred to the storage device, transmitting the foggy programmed data and the soft bit page to the storage device; receiving decoded foggy programmed data from the storage device; and writing the decoded foggy programmed data to the block with a fine program operation.

20 . The method of claim 14 , wherein when the soft bit page is transmitted to the storage device with the foggy programmed data, the soft bit page attaches reliability information to the foggy programmed data to improve error correction on the storage device.