IP Library Granted Patent US 12670259
Granted Patent B2
US 12670259 · App. 18/746,353 · Granted Jun 30, 2026

Systems and methods for cross operating environment diagnostic operations with context resume

Inventors: Ibrahim Sayyed (Georgetown, TX); Adolfo S. Montero (Pflugerville, TX); Phanindra Bhargav Talasila (Georgetown, TX); Amit K Tiwari (Austin, TX)
Assignee: Dell Products L.P.
G06F21/572G06F21/577
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Quick Facts
Patent No.
US 12670259
App. No.
18/746,353
Granted
Jun 30, 2026
Kind
B2
Abstract

Systems and methods for cross operating environment diagnostic operations with context resume. An Information Handling System (IHS) includes a processor and a memory coupled to the processor. The memory stores program instructions that, upon execution, cause the IHS to receive a command at a Basic Input/Output System (BIOS) from an Embedded Controller (EC) to perform a deep scan diagnostic operation. The command is received in response to a request by a host Operating System (OS) application. The BIOS executes the deep scan diagnostic operation and stores the result in an Advanced Configuration and Power Interface (ACPI) table. The host OS retrieves the result from the ACPI table and validates the result. The system enables comprehensive diagnostics by leveraging the BIOS environment, ensuring seamless context resume.

Claims (31)

1 . An Information Handling System (IHS), comprising:

a processor; and

a memory coupled to the processor, the memory having program instructions stored thereon that, upon execution, cause the IHS to:

receive a command over a mailbox interface, at a Basic Input/Output System (BIOS), from an Embedded Controller (EC), to perform a deep scan diagnostic operation, wherein the command is received in response to a request by a host Operating System (OS) application;

execute the deep scan diagnostic operation; and

store a result of the deep scan diagnostic operation in an Advanced Configuration and Power Interface (ACPI) table;

wherein prior to execution of the deep scan diagnostic operation, save a context of the host OS application and to reboot to transition from a host OS environment to a BIOS environment;

wherein after diagnostics are completed, an auto-resume service restores the context of the host OS application using a registry; and

wherein the host OS validates a BIOS signature in the ACPI table and retrieve the result of the deep scan diagnostic operation from the ACPI table.

2 . The IHS of claim 1 , wherein the deep scan diagnostics comprise at least one of: a Power-On Self-Test (POST), a memory test, a processor test, a storage device test, a peripheral device check, a graphics card test, a network interface check, fan and temperature monitoring, power supply diagnostics, an integrated component test, a Complementary Metal-Oxide-Semiconductor (CMOS) battery check, an I/O controller test, a Universal Serial Bus (USB) controller test, a system clock check, or a PCIe device test.

3 . The IHS of claim 1 , wherein the program instructions, upon execution, cause the IHS to request a user's consent before execution of the deep scan diagnostic operation.

4 . The IHS of claim 1 , wherein the program instructions, upon execution, further cause the BIOS to notify the EC of the result.

5 . The IHS of claim 4 , wherein the host OS is configured to retrieve an indication of the real-time progress or status of the deep scan diagnostic operation from the EC.

6 . The IHS of claim 1 , wherein the program instructions, upon execution, further cause the BIOS to notify the EC of a real-time progress or status of the deep scan diagnostic operation.

7 . The IHS of claim 6 , wherein the host OS is configured to retrieve an indication of the real-time progress or status of the deep scan diagnostic operation from the EC.

8 . A method by an Embedded Controller (EC) of an Information Handling System (IHS), the method comprising:

in response to a request, from a host Operating System (OS) application, sending a command to a Basic Input/Output System (BIOS) over a mailbox interface to trigger a deep scan diagnostic operation by the BIOS, the BIOS storing a result of the deep scan operation in an Advanced Configuration and Power Interface (ACPI) table;

receiving an indication of a result of the deep scan diagnostic operation from the BIOS; and

providing the indication to the host OS application;

wherein prior to execution of the deep scan diagnostic operation, saving a context of the host OS application and to reboot to transition from a host OS environment to a BIOS environment;

wherein after diagnostics are completed, restoring the context of the host OS application using a registry; and

wherein the host OS validates a BIOS signature in the ACPI table and retrieves the result of the deep scan diagnostic operation from the ACPI table.

9 . The method of claim 8 , further comprising requesting a user's consent before execution of the deep scan diagnostic operation.

10 . A hardware memory device having program instructions stored thereon that, upon execution by a processor of an Information Handling System (IHS), cause the IHS to:

send a request, by a host Operating System (OS) application to an Embedded Controller (EC), to trigger a deep scan diagnostic operation by a Basic Input/Output System (BIOS), wherein the BIOS receives a command from the EC using a mailbox interface; and

receive an indication of a result of the deep scan diagnostic operation from the EC, wherein the result is stored by the BIOS in an Advanced Configuration and Power Interface (ACPI) table;

wherein prior to execution of the deep scan diagnostic operation, save a context of the host OS application and to reboot to transition from a host OS environment to a BIOS environment;

wherein after diagnostics are completed, an auto-resume service restores the context of the host OS application using a registry; and

wherein the host OS application retrieves the result upon validation of the ACPI table with a BIOS signature.

11 . The hardware memory device of claim 10 , wherein the processor is part of a heterogeneous computing platform selected from the group consisting of: a System-On-Chip (SoC), a Field-Programmable Gate Array (FPGA), and an Application-Specific Integrated Circuit (ASIC).

12 . The hardware memory device of claim 11 , wherein the heterogeneous computing platform comprises a Reduced Instruction Set Computer (RISC) processor coupled to the EC via an interconnect, and wherein the interconnect comprises at least one of: an Advanced Microcontroller Bus Architecture (AMBA) bus, a QuickPath Interconnect (QPI) bus, or a HyperTransport (HT) bus.