IP Library Granted Patent US 12670538
Granted Patent B2
US 12670538 · App. 18/429,487 · Granted Jun 30, 2026

Frame rendering timing control

Inventor: Sachiyo Aoki (Tokyo, JP)
Assignee: Sony Interactive Entertainment Inc.
G06T1/20A63F13/63G06T1/60
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Quick Facts
Patent No.
US 12670538
App. No.
18/429,487
Granted
Jun 30, 2026
Kind
B2
Abstract

Provided is an information processing apparatus including a processor, the information processing apparatus drawing and buffering images frame by frame and outputting the buffered frame every predetermined timing, in which the processor performs a standby process of keeping a frame drawing process on standby until a specified timing, and starts and controls the performance of the frame drawing process after the standby process.

Claims (63)

1 . An information processing apparatus comprising:

one or more processors configured to:

receive a frame count from a frame to be output at a reference timing to another frame to be output ahead of the frame;

hold generating a drawing instruction of a target frame based on the frame count; and

start generating the drawing instruction of the target frame causing drawing the target frame.

2 . The information processing apparatus according to claim 1 ,

wherein the information processing apparatus is connected to a peripheral apparatus including a graphics processor,

wherein the one or more processors are configured to generate and provide the drawing instruction to the graphics processor, and

wherein the graphics processor is configured to draw the target frame in accordance with the drawing instruction.

3 . The information processing apparatus according to claim 2 ,

wherein the one or more processors are configured to determine a standby period for holding the generation of the drawing instruction of the target frame with reference to when the target frame is output.

4 . The information processing apparatus according to claim 2 , wherein

the one or more processors are configured to inquire the graphics processor a status of the process every predetermined inquiry cycle.

5 . The information processing apparatus according to claim 1 , wherein the one or more processors are further configured to:

receive a predetermined time; and

hold generating

the drawing instruction of the target frame to a graphic processor until the predetermined time elapses from when the graphic processor outputs another frame preceding the target frame by the frame count.

6 . The information processing apparatus according to claim 5 , wherein

the frame count is an integer equal to or larger than 2, and,

when the graphic processor outputs the other frame by a predetermined count smaller than the frame count while the one or more processors are holding generating the drawing instruction of the target frame, the one or more processors are configured to generate the drawing instruction of the target frame.

7 . The information processing apparatus according to claim 1 , wherein,

when a predetermined timeout time elapses from when the one or more processors started holding generating the drawing instruction of the target frame, the one or more processors are configured to generate the drawing instruction of the target frame.

8 . The information processing apparatus according to claim 1 , wherein

the one or more processors are further configured to:

accept an input while holding generation of the drawing instruction, and

causes generation of the drawing instruction based on the accepted input.

9 . An information processing apparatus comprising:

one or more processors configured to generate a drawing instruction of a frame; and

a graphics processor configured to draw the frame based on the drawing instruction, wherein the one or more processors are configured to:

receive a frame count from a frame to be output at a reference timing to another frame to be output ahead of the frame;

hold generating a drawing instruction of a target frame to the graphic processor based on the frame count; and

start generating the drawing instruction of the target frame causing drawing the target frame.

10 . The information processing apparatus of claim 9 , wherein the one or more processors are further configured to:

receive a predetermined time,

wherein hold generating the drawing instruction of the target frame to the graphic processor until the predetermined time elapses from when the graphic processor outputs another frame preceding the target frame by the frame count.

11 . The information processing apparatus of claim 10 , wherein

the frame count is an integer equal to or larger than 2, and,

when the graphic processor outputs the other frame by a predetermined count smaller than the frame count while the one or more processors are holding generating the drawing instruction of the target frame, the one or more processors are configured to generate the drawing instruction of the target frame.

12 . The information processing apparatus of claim 9 , wherein,

when a predetermined timeout time elapses from when the one or more processors started holding generating the drawing instruction of the target frame, the one or more processors are configured to generate the drawing instruction of the target frame.

13 . A method comprising:

receiving a frame count from a frame to be output at a reference timing to another frame to be output ahead of the frame;

holding generation of a drawing instruction of a target frame based on the frame count; and

generating the drawing instruction of the target frame causing drawing the target frame.

14 . The method of claim 13 , further comprising:

receiving a predetermined time; and

holding generation of the drawing instruction of the target frame to a graphic processor until the predetermined time elapses from when the graphic processor outputs another frame preceding the target frame by the frame count.

15 . The method of claim 14 , wherein

the frame count is an integer equal to or larger than 2, and,

wherein generating the drawing instruction of the target frame is executed when the graphic processor outputs the other frame by a predetermined count smaller than the frame count while holding generation of the drawing instruction of the target frame.

16 . The method of claim 13 , wherein,

wherein generating the drawing instruction of the target frame is executed when a predetermined timeout time elapses since holding generating the drawing instruction of the target frame is started.

17 . A non-transitory, computer readable storage medium containing a program, which when executed by a processor, causes the processor to perform a method by carrying out actions, comprising:

by a processor,

receiving a frame count from a frame to be output at a reference timing to another frame to be output ahead of the frame;

holding generation of a drawing instruction of a target frame based on the frame count; and

generating the drawing instruction of the target frame causing drawing the target frame.

18 . The non-transitory, computer readable storage medium of claim 17 , which when executed by a processor, causes the processor to perform a method by carrying out actions, further comprising:

receiving a predetermined time; and

holding generation of the drawing instruction of the target frame to a graphic processor until the predetermined time elapses from when the graphic processor outputs another frame preceding the target frame by the frame count.

19 . The non-transitory, computer readable storage medium of claim 18 , wherein

the frame count is an integer equal to or larger than 2, and,

wherein generating the drawing instruction of the target frame is executed when the graphic processor outputs the other frame by a predetermined count smaller than the frame count while holding generation of the drawing instruction of the target frame.