IP Library › Granted Patent US 12670825

Granted Patent B2

US 12670825 · App. 19/039,923 · Granted Jun 30, 2026

Display panel and display device

Inventors: You Pan (Wuhan, CN); Qiang Gong (Wuhan, CN)

Assignee: WUHAN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.

G09G3/20 G09G2300/08 G09G2310/0254 G09G2310/08 G09G2320/0247

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Quick Facts

Patent No.: US 12670825
App. No.: 19/039,923
Granted: Jun 30, 2026
Kind: B2

External Links

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Abstract

A display panel, for displaying images including a first frame and a second frame, includes subpixels, scan lines, data lines, and a compensation module. The data lines are configured to input a first data voltage to the subpixels in a display period of the first frame and to input a second data voltage to the subpixels in a display period of the second frame. The compensation module is configured to input a first compensation voltage to the subpixels in a blank period of the first frame and to input a second compensation voltage to the subpixels in a blank period of the second frame, where the first compensation voltage is not zero, and the second compensation voltage is not zero.

Claims (62)

1 . A display panel, for displaying images comprising a first frame and a second frame, the display panel comprising:

a plurality of subpixels;

a plurality of scan lines, arranged in a first direction and connected to the plurality of sub-pixels;

a plurality of data lines, arranged in a second direction crossing the first direction, connected to the plurality of sub-pixels, and configured to input a first data voltage to the subpixels in a display period of the first frame and to input a second data voltage to the subpixels in a display period of the second frame; and

a compensation module, electrically connected to the plurality of data lines, and configured to input a first compensation voltage to the subpixels in a blank period of the first frame and to input a second compensation voltage to the subpixels in a blank period of the second frame, wherein the first compensation voltage is not zero, and the second compensation voltage is not zero;

wherein a polarity of the first data voltage input to the subpixels in the display period of the first frame is opposite to a polarity of the second data voltage input to the subpixels in the display period of the second frame; a polarity of the first compensation voltage is the same as the polarity of the first data voltage, and a polarity of the second compensation voltage is the same as the polarity of the second data voltage;

wherein an absolute value of the first compensation voltage is less than or equal to an absolute value of the first data voltage, and an absolute value of the second compensation voltage is less than or equal to an absolute value of the second data voltage;

wherein the compensation module comprises a plurality of first switching transistors and a plurality of second switching transistors; and

wherein the first switching transistors and the second switching transistors are turned off in the display periods, and the first switching transistors and the second switching transistors are turned on in the blank periods.

2 . The display panel according to claim 1 , wherein the plurality of data lines comprise a plurality of first data lines and a plurality of second data lines alternately disposed along the second direction;

the first data voltage comprises a first positive polarity data voltage and a first negative polarity data voltage; in the display period of the first frame, a data voltage input by the first data lines to the subpixels being the first positive polarity data voltage, and a data voltage input by the second data lines to the subpixels being the first negative polarity data voltage;

the second data voltage comprises a second positive polarity data voltage and a second negative polarity data voltage; in the display period of the second frame, a data voltage input by the first data lines to the subpixels being the second negative polarity data voltage, and a data voltage input by the second data lines to the subpixels being the second positive polarity data voltage.

3 . The display panel according to claim 2 , wherein the compensation module comprises:

a first compensation voltage output terminal, connected to the first data lines; and

a second compensation voltage output terminal, connected to the second data lines;

wherein the first compensation voltage comprises a first positive polarity compensation voltage and a first negative polarity compensation voltage, the first positive polarity compensation voltage is less than or equal to the first positive polarity data voltage, and the first negative polarity compensation voltage is greater than or equal to the first negative polarity data voltage;

wherein the second compensation voltage comprises a second positive polarity compensation voltage and a second negative polarity compensation voltage, the second positive polarity compensation voltage is less than or equal to the second positive polarity data voltage, and the second negative polarity compensation voltage is greater than or equal to the second negative polarity data voltage.

4 . The display panel according to claim 3 , wherein

each of the plurality of first switching transistors comprises a gate electrically connected to a global control signal terminal, a first input terminal electrically connected to the first compensation voltage output terminal, and a second input terminal electrically connected to a respective one of the first data lines; and

each of the plurality of second switching transistors comprises a gate electrically connected to the global control signal terminal, a first input terminal electrically connected to the second compensation voltage output terminal, and a second input terminal electrically connected to a respective one of the second data lines.

5 . The display panel according to claim 4 , wherein each of the blank periods comprises a first blank sub-period and a second blank sub-period adjacent to the first blank sub-period;

wherein the first switching transistors and the second switching transistors are turned on in the first blank sub-period, and the first switching transistors and the second switching transistors are turned off in the second blank sub-period; or

the first switching transistors and the second switching transistors are turned on in the second blank sub-period, and the first switching transistors and the second switching transistors are turned off in the first blank sub-period.

6 . The display panel according to claim 5 , wherein during the blank periods, turned-on time of the first switching transistors and the second switching transistors is greater than turned-off time of the first switching transistors and the second switching transistors.

7 . The display panel according to claim 3 , wherein

each of the plurality of first switching transistors comprises a gate electrically connected to a first control signal terminal, a first input terminal electrically connected to the first compensation voltage output terminal, and a second input terminal electrically connected to a respective one of the first data lines; and

each of the plurality of second switching transistors comprises a gate electrically connected to a second control signal terminal, a first input terminal electrically connected to the second compensation voltage output terminal, and a second input terminal electrically connected to a respective one of the second data lines.

8 . The display panel according to claim 7 , wherein each of the blank periods comprises a first blank sub-period, a second blank sub-period, and a third blank sub-period, and the second blank sub-period is between the first blank sub-period and the third blank sub-period;

the first switching transistors are turned on in the first blank sub-period and the second blank sub-period, the first switching transistors are turned off in the third blank sub-period, the second switching transistors are turned on in the second blank sub-period and the third blank sub-period, and the second switching transistors are turned off in the first blank sub-period.

9 . The display panel according to claim 7 , wherein each of the blank periods comprises a plurality of first blank sub-periods and a plurality of second blank sub-periods, and the first blank sub-periods and the second blank sub-periods alternate;

the first switching transistors are turned on in the plurality of first blank sub-periods, and the first switching transistors are turned off in the plurality of second blank sub-periods; the second switching transistors are turned on in the plurality of second blank sub-periods, and the second switching transistors are turned off in the plurality of the first blank sub-periods.

10 . A display device, comprising a frame body and a display panel for displaying images comprising a first frame and a second frame, the display panel comprising:

a plurality of subpixels;

a plurality of scan lines, arranged in a first direction and connected to the plurality of sub-pixels;

wherein the compensation module comprises a plurality of first switching transistors and a plurality of second switching transistors; and

11 . The display device according to claim 10 , wherein the plurality of data lines comprise a plurality of first data lines and a plurality of second data lines alternately disposed along the second direction;

12 . The display device according to claim 11 , wherein the compensation module comprises:

a first compensation voltage output terminal, connected to the first data lines; and

a second compensation voltage output terminal, connected to the second data lines;

13 . The display device according to claim 12 , wherein

14 . The display device according to claim 13 , wherein each of the blank periods comprises a first blank sub-period and a second blank sub-period adjacent to the first blank sub-period;

15 . The display device according to claim 14 , wherein during the blank periods, turned-on time of the first switching transistors and the second switching transistors is greater than turned-off time of the first switching transistors and the second switching transistors.

16 . The display device according to claim 12 , wherein

17 . The display device according to claim 16 , wherein each of the blank periods comprises a first blank sub-period, a second blank sub-period, and a third blank sub-period, and the second blank sub-period is between the first blank sub-period and the third blank sub-period;

18 . The display device according to claim 16 , wherein each of the blank periods comprises a plurality of first blank sub-periods and a plurality of second blank sub-periods, and the first blank sub-periods and the second blank sub-periods alternate;