Display apparatus
A display apparatus includes: a substrate comprising a display area and a peripheral area; a light-emitting diode in the display area on a front surface of the substrate; a driving transistor in the display area, electrically connected to the light-emitting diode, and comprising a silicon-based semiconductor layer; a switching transistor in the display area and configured to transmit a data voltage to the driving transistor; a compensation transistor in the display area, configured to diode-connect the driving transistor, and comprising an oxide-based semiconductor layer; a gate driving circuit in the peripheral area and electrically connected to the compensation transistor; and a first lower layer in the peripheral area and interposed between the substrate and the gate driving circuit.
1 . A display apparatus comprising:
a substrate comprising a display area and a peripheral area;
a light-emitting diode in the display area on a front surface of the substrate;
a driving transistor in the display area, electrically connected to the light-emitting diode, and comprising a silicon-based semiconductor layer;
a switching transistor in the display area and configured to transmit a data voltage to the driving transistor;
a compensation transistor in the display area, configured to diode-connect the driving transistor, and comprising an oxide-based semiconductor layer;
a gate driving circuit in the peripheral area and electrically connected to the compensation transistor; and
a first lower layer in the peripheral area and interposed between the substrate and the gate driving circuit,
wherein a width of the first lower layer is greater than a width of the gate driving circuit in a plan view, and
wherein a distance between a center of the width of the first lower layer and an edge of the substrate is less than a distance between a center of the width of the gate driving circuit and the edge of the substrate, the edge of the substrate being further from the display area than the center of the width of the first lower layer, and the center of the width of the first lower layer and the center of the width of the gate driving circuit overlap the substrate in the plan view with the first lower layer positioned closer to the edge of the substrate that is further from the display area than the center of the width of the first lower layer relative to the gate driving circuit.
2 . The display apparatus of claim 1 , wherein the first lower layer comprises a metal.
3 . The display apparatus of claim 2 , further comprising
a bottom metal layer in the display area and comprising a portion overlapping the driving transistor,
wherein the first lower layer and the bottom metal layer comprise a same material.
4 . The display apparatus of claim 1 , wherein a portion of the first lower layer adjacent to an edge of the substrate further extends from the gate driving circuit toward the edge of the substrate.
5 . The display apparatus of claim 1 , further comprising a first metal layer on a rear surface of the substrate opposite to the front surface of the substrate, and having a mesh structure comprising a plurality of holes.
6 . The display apparatus of claim 5 , wherein at least one of the plurality of holes of the first metal layer overlaps the gate driving circuit.
7 . The display apparatus of claim 6 , wherein the substrate comprises a folding area,
wherein the plurality of holes of the first metal layer correspond to the folding area of the substrate.
8 . The display apparatus of claim 1 , further comprising a protective layer on the light-emitting diode and comprising a light-shielding portion corresponding to the peripheral area,
wherein the gate driving circuit overlaps the light-shielding portion of the protective layer.
9 . The display apparatus of claim 1 , wherein the first lower layer has a constant voltage level.
10 . An electronic device comprising:
a substrate comprising a display area and a peripheral area;
a plurality of light-emitting diodes on a front surface of the substrate in the display area;
a plurality of sub-pixel circuits respectively electrically connected to the plurality of light-emitting diodes and in the display area,
wherein each of the plurality of sub-pixel circuits comprises a driving transistor in the display area and electrically connected to the light-emitting diode, a switching transistor in the display area and configured to transmit a data voltage to the driving transistor, and a compensation transistor in the display area and configured to diode-connect the driving transistor;
a gate driving circuit in the peripheral area and configured to apply a compensation signal to compensation transistors of sub-pixel circuits arranged in an n th row (n is a natural number) through a compensation gate line; and
a first lower layer in the peripheral area and interposed between the substrate and the gate driving circuit,
wherein a width of the first lower layer is greater than a width of the gate driving circuit in a plan view, and
wherein a distance between a center of the width of the first lower layer and an edge of the substrate is less than a distance between a center of the width of the gate driving circuit and the edge of the substrate, the edge of the substrate being further from the display area than the center of the width of the first lower layer, and the center of the width of the first lower layer and the center of the width of the gate driving circuit overlap the substrate in the plan view with the first lower layer positioned closer to the edge of the substrate that is further from the display area than the center of the width of the first lower layer relative to the gate driving circuit.
11 . The electronic device of claim 10 , wherein each of the plurality of sub-pixel circuits further comprises an initialization transistor electrically connected to a gate electrode of the driving transistor,
wherein the gate driving circuit is configured to apply a gate initialization signal to initialization transistors of sub-pixel circuits arranged in an m th row (m is a natural number greater than n+1) through an initialization gate line.
12 . The electronic device of claim 10 , wherein the first lower layer comprises a metal.
13 . The electronic device of claim 12 , further comprising a bottom metal layer in the display area and comprising a portion overlapping the driving transistor,
wherein the first lower layer and the bottom metal layer comprise a same material.
14 . The electronic device of claim 10 , wherein a portion of the first lower layer adjacent to an edge of the substrate further extends from the gate driving circuit toward the edge of the substrate.
15 . The electronic device of claim 10 , further comprising a first metal layer on a rear surface of the substrate opposite to the front surface of the substrate, and having a mesh structure comprising a plurality of holes.
16 . The electronic device of claim 15 , wherein at least one of the plurality of holes of the first metal layer overlaps the gate driving circuit.
17 . The electronic device of claim 15 , wherein the substrate comprises a folding area,
wherein the plurality of holes of the first metal layer correspond to the folding area of the substrate.
18 . The electronic device of claim 10 , further comprising a protective layer on the plurality of light-emitting diodes and comprising a light-shielding portion corresponding to the peripheral area,
wherein the gate driving circuit overlaps the light-shielding portion of the protective layer.
19 . The electronic device of claim 10 , wherein the first lower layer has a constant voltage level.