Electrical device including switching converter which controls a switching frequency to be outside an audible noise range
An electronic device is provided. The electronic device includes: a first transistor configured to connect an input voltage node to a switching node; a second transistor configured to connect the switching node to a ground node; a latch circuit configured to generate a first signal having a first frequency and to control the first frequency based on a level of a load current; a switching modulation circuit configured to generate a second signal having a second frequency which is 1/N (where N is a natural number) times the first frequency; and a controller configured to control each of the first transistor and the second transistor, based on the second signal.
1 . An electronic device comprising:
a first transistor configured to connect an input voltage node to a switching node;
a second transistor configured to connect the switching node to a ground node;
a latch circuit configured to generate a first signal having a first frequency and to control the first frequency based on a level of a load current;
a switching modulation circuit configured to control an N-times modulation operation on the first signal to generate a second signal having a second frequency which is 1/N times the first frequency, wherein N is a natural number of 2 or more when the first frequency is within a reference frequency range, and N is 1 when the first frequency is outside the reference frequency range; and
a controller configured to control each of the first transistor and the second transistor, based on the second signal.
2 . The electronic device of claim 1 , wherein the first frequency is within the reference frequency range, and wherein the second frequency is outside the reference frequency range.
3 . The electronic device of claim 1 , wherein the switching modulation circuit is further configured to control the second frequency to be 1/(2 K+1 ) based on the first frequency reaching 2 K times a lower level of the reference frequency range and being less than an upper level of the reference frequency range, wherein K is a natural number or zero.
4 . The electronic device of claim 3 , wherein the switching modulation circuit is further configured to control the second frequency to 1 times the first frequency based on the first frequency being greater than the upper level of the reference frequency range.
5 . The electronic device of claim 1 , further comprising:
an inductor connected with the switching node and configured to conduct an inductor current, wherein the inductor current increases based on the first transistor being on and decreases based on the second transistor being on; and
a zero current detection circuit configured to detect a zero level of the inductor current N times during a period of the second signal.
6 . The electronic device of claim 1 , wherein the first transistor is configured to turn on and off based on a first control signal,
wherein the controller is further configured to control the first control signal to turn on the first transistor N times during a period of the second signal, and
wherein an interval between the N times is less than a period of the first signal.
7 . The electronic device of claim 1 , wherein the second transistor is configured to turn on and off based on a second control signal,
wherein the controller is further configured to control the second control signal to turn off the second transistor N times during a period of the second signal, and
wherein an interval between the N times is less than a period of the first signal.
8 . An electronic device comprising:
a first transistor configured to connect an input node with a switching node according to a first control signal;
a second transistor configured to connect the switching node with a ground node according to a second control signal;
an inductor connected with the switching node and configured to conduct an inductor current, wherein the inductor current increases based on the first transistor being on and decreases based on the second transistor being on;
an oscillator configured to generate a first signal, based on an error signal, wherein the error signal is generated based on a level of an input signal applied to the input node;
a ramp generation circuit configured to generate a ramp signal, based on the first control signal and the second control signal;
a comparator circuit configured to generate a second signal, based on the error signal and the ramp signal;
a latch circuit configured to generate a third signal having a first frequency, based on the first signal and the second signal;
a switching modulation circuit configured to generate a fourth signal having a second frequency which is less than the first frequency; and
a controller configured to generate the first control signal and the second control signal, based on the fourth signal.
9 . The electronic device of claim 8 , wherein the controller is further configured to activate the first control signal based on activation of the first signal and deactivate the first control signal based on activation of the second signal.
10 . The electronic device of claim 8 , wherein the controller is further configured to activate the second control signal based on activation of the second signal and deactivate the second control signal based on the inductor current being 0.
11 . The electronic device of claim 8 , wherein the first frequency is within a reference frequency range, and the second frequency is outside the reference frequency range.
12 . The electronic device of claim 8 , wherein the switching modulation circuit is further configured to control the second frequency to be less than a lower level of a reference frequency range based on the first frequency being within the reference frequency range.
13 . The electronic device of claim 12 , wherein the switching modulation circuit is further configured to control the second frequency to be equal to the first frequency based on the first frequency being outside the reference frequency range.
14 . The electronic device of claim 8 , further comprising a zero current detection circuit configured to detect a zero level of the inductor current at least twice during a period of the second signal.
15 . The electronic device of claim 8 , wherein the controller is further configured to control the first control signal and the second control signal to turn on each of the first transistor and the second transistor at least two times during a period of the second signal, and
wherein an interval between times at which the first control signal turns on the first transistor is less than a period of the first signal.