IP Library Granted Patent US 12,671,351
Granted Patent B2
US 12,671,351 · App. 18/915,742 · Granted Jun 30, 2026

Full-bridge inverter device

Inventors: Wei-Hao Cheng (Taoyuan City, TW); Laskar Pamungkas (Taoyuan City, TW); Irawan Yusa Harjanto (Taoyuan City, TW)
Assignee: Wei-Kuan Cheng
H02M7/53871H02J3/38H02M1/08H02J2101/24
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Quick Facts
Patent No.
US 12,671,351
App. No.
18/915,742
Granted
Jun 30, 2026
Kind
B2
Abstract

A full-bridge inverter device includes channel-1 including first inverter formed of first DC link capacitor, first full bridge circuit and first output filter, second voltage and current probes and first AC load, first full bridge circuit being coupled with first gate driver circuit and first sin pulse width modulation that provides first positive half cycle output signal and first negative half cycle output signal; and channel-2 including second inverter formed of second DC link capacitor, second full bridge circuit and second output filter, third voltage and current probes and second AC load, second full bridge circuit being coupled with second gate driving circuit and second sin pulse width modulation that provides second positive half cycle output signal and second negative half cycle output signal. The phase difference between first positive (negative) half cycle output signal and second positive (negative) half cycle output signal is 90 degrees.

Claims (9)

1 . A full-bridge inverter device provided in a solar power generation system, comprising a DC source provided by a solar battery, third voltage and current probes for detecting said DC source, a channel-1 coupled to said third voltage and current probes and a channel-2 connected in parallel to said channel-1, wherein:

said channel-1 comprises a first DC link capacitor, a first full bridge circuit, a first output filter, first voltage and current probes and a first AC load coupled to said third voltage and current probes, said first DC link capacitor, said first full bridge circuit and said first output filter constituting a first inverter, said first full bridge circuit being further coupled with a first gate driver circuit and a first sine pulse width modulation that provides a first positive half cycle output signal and a first negative half cycle output signal;

said channel-2 comprises a second DC link capacitor, a second full bridge circuit, a second output filter, second voltage and current probes and a second AC load coupled to said third voltage and current probes, said second DC link capacitor, said second full bridge circuit and said second output filter constituting a second inverter, said second full bridge circuit being further coupled with a second gate driver circuit and a second sine pulse width modulation that provides a second positive half cycle output signal and a second negative half cycle output signal, said first positive half cycle output signal and said second positive half cycle output signal having a 90 degrees phase difference therebetween, said first negative half cycle output signal and said second negative half cycle output signal having a 90 degrees phase difference therebetween, said full-bridge inverter device composed of said channel-1 and said channel-2 reducing input peak current and combined output power,

wherein said first sine pulse width modulation comprises a first comparator, said first comparator comprising a positive input terminal connected to a first modulation index, which is connected to a first sinusoidal reference having an end connected to a ground, a negative input terminal connected to a triangular carrier having an end connected to a ground, a positive power supply terminal connected to Vcc, a negative power supply terminal connected to a ground, and an output terminal forming said first positive half cycle output signal and connected to a first inverter that forms said first negative half cycle output signal, and

wherein said second sine pulse width modulation comprises a second comparator, said second comparator comprising a positive input terminal connected to a second modulation index, which is connected to a second sinusoidal reference having an connected to a ground, a negative input terminal connected to a triangular carrier having an end connected to a ground, a positive power supply terminal connected to Vcc, a negative power supply terminal connected to a ground, and an output terminal forming said second positive half cycle output signal and connected to a second inverter that forms said second negative half cycle output signal.

2 . The full-bridge inverter device as claimed in claim 1 , wherein said first AC load receives a signal from on-grid system or off-grid load.

3 . The full-bridge inverter device as claimed in claim 1 , wherein said second AC load receives a signal from on-grid system or off-grid load.

4 . The full-bridge inverter device as claimed in claim 1 , wherein said first output filter includes two inductors respectively connected to one of two wires on an output side of said first full bridge circuit, and a capacitor is connected across said two inductors.

5 . The full-bridge inverter device as claimed in claim 1 , wherein said second output filter includes two inductors respectively connected to one of two wires on an output side of said second full bridge circuit, and a capacitor is connected across said two inductors.